• Title/Summary/Keyword: set test

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Engineering-scale Test for Validating the T-H-M Behavior of a HLW Repository: Experimental Set-up

  • Lee, Jae-Owan;Baik, Min-Hoon;Cho, Won-Jin
    • Proceedings of the Korean Radioactive Waste Society Conference
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    • 2004.06a
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    • pp.194-198
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    • 2004
  • The thermo-hydro-mechanical (T-H-M) process is one of major issues in the performance assessment of a high level waste (HLW) repository. An engineering-scale test was planned and its experimental set-up has being installed, to validate the T-H-M behavior in the buffer of a reference disposal system. The experimental set-up consists of 4 major components: the confining cylinder with its hydration water tank, the bentonite block, the heating system, and the sensors and instruments. The monitoring and data acquisition system is employed to control the heater to maintain the temperature of $95^{\circ}C$ at the interface of the heater and bentonite blocks and to collect signals from sensors and instruments installed in the bentonite blocks.

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Load Simulator with Power-Recovery Capability Based on Voltage Source Converter-Inverter Set (전력회수 능력을 갖는 전압원 컨버터-인버터 세트로 구성된 부하모의장치)

  • Bae B.Y.;Han B.M.
    • Proceedings of the KIPE Conference
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    • 2004.11a
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    • pp.76-80
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    • 2004
  • This paper describes a load simulator with power-recovery capability, which is based on the voltage source converter-inverter set. The load simulator described in this paper can save the electric energy that should be consumed to test the operation and performance of the distributed generation system and the power quality compensator. The load simulator consists of a converter-inverter set with a DSP controller for system control and PWM pulse generation. The converter operates as a universal load to model the linear load and the non-linear load, while the inverter feed the energy back to the power source with harmonic compensation. The load simulator can be widely used in the lab to test the performance of the distributed generation system and the power quality compensator.

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Load Simulator with Power-Recovery Capability Based on Voltage Source Converter-Inverter Set (전력회수 능력을 갖는 전압원 컨버터-인버터 세트로 구성 된 부하모의 장치)

  • Bae Byung-Yeol;Han Byung-Moon
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.54 no.4
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    • pp.181-187
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    • 2005
  • This paper describes a load simulator with power-recovery capability, which is based on the voltage source converter-inverter set. The load simulator described in this paper can save the electric energy that should be consumed to test the operation and performance of the distributed generation system and the power quality compensator. The load simulator consists of a converter-inverter set with a DSP controller for system control and PWM pulse generation. The converter operates as a universal load to model the linear load and the non-linear load, while the inverter feed the energy back to the power source with harmonic compensation. The load simulator can be widely used in the lab to test the performance of the distributed generation system and the power quality compensator.

VHDL Chip Set Design and implementation for Memory Tester Algorithm (Memory Tester 알고리즘의 VHDL Chip Set 설계 및 검증)

  • Jeong, Ji-Won;Gang, Chang-Heon;Choe, Chang;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.924-927
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    • 2003
  • In this paper, we design the memory tester chip set playing an important role in the memory tester as central parts. Memory tester has the sixteen inner instructions to control the test sequence and the address and data signals to DUT. These instructions are saved in memory with each chip such as sequence chip and address/data generator chip. Sequence chip controls the test sequence according to instructions saved in the memory. And Generator chip generates the address and data signals according to instructions saved in the memory, too.

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Experimental Verification of Set-Up Reference Values for the Determination of Downcoiling Tension in Hot Strip Mill (열간압연시 권취장력 설정기준치의 실험적 검증)

  • 공성락;강용기;김영환;문영훈
    • Transactions of Materials Processing
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    • v.10 no.1
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    • pp.53-58
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    • 2001
  • Set-up reference values, used in determining the optimum downcoiling tension, we experimentally verified in this study. During the actual downcoiling, the strip suffers both tension and bending force through the rotation of mandrel. Therefore, simulative test which can measure both tension and bending resistance of strip was performed to estimate set-up reference value for strip tension during downcoiling operations. The values obtained from the simulative test were correlated with the yield stress which has conventionally been used as reference values for downcoiling tension. The correlative analysis showed that the yield stress of strip can be a good reference value for downcoiling tension. Furthermore, the bending load also shows strong correlation with simulated values due to the close relationship between yield stress and bending load.

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Verification of the upper limit of results through dilution tests for RIA test (RIA 검사별 희석실험을 통한 결과의 상한치 검증)

  • LEE, Geun Ui;CHOI, Jin Ju;LEE, Young Ji;YOO, Seon Hee;LEE, Sun Ho
    • The Korean Journal of Nuclear Medicine Technology
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    • v.26 no.1
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    • pp.42-46
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    • 2022
  • Purpose In the meantime, there have been not many samples that require dilution, and it has been difficult for the examiner to set an appropriate dilution multiple for RIA test item and report the results. Accordingly, it was judged that it was necessary to set the maximum dilution multiple for each test and to verify the upper limit of the clinical reportable range. Therefore, in this study, the maximum dilution multiple for each RIA test was set and the upper limit of the clinical reportable range was verified accordingly Materials and Methods Among all RIA tests conducted at Asan Medical Center, the study treated on 30 types of tests which also conduct the dilution test. Data from March to July 2021 were collected and analyzed. The study was conducted on samples subjected to serial dilutions such as X2, X4 or X10, X102, X103, X104, X105. Results Among a total of 30 test types, 18 test types have more than 5 N values in the tolerance range of 80~120%. As a result of the verification of maximum dilution multiples, the test set to 104 is 𝛼-fetoprotein and thyroglobulin, and the test set to 103 is CA-125, CEA, and 𝛽-hCG, and the test set to 102 is Free PSA, PSA, CA15-3, SCC, Ferritin, PTH, Cortisol, and Calcitonin. Tests set to 10 include three categories: 𝛽2-Microglobulin, C-peptide, and Testosterone. Conclusion It is expected that it will contribute to improving the quality of nuclear medicine blood tests as the results of dilution experiments can be reported quickly and accurately through the verification of the clinical reportable range.

A Study on Mathematics Question Item Trend in Elementary School Teacher Selection Test (초등교사 임용 시험에서 수학 교과 문항의 출제 동향 분석)

  • Lee, Jong-hak
    • Journal of the Korean School Mathematics Society
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    • v.18 no.4
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    • pp.431-448
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    • 2015
  • Elementary school teacher selection test has to be implemented for knowledge(MKT) to estimate and to be a step in the expansionary direction. For this, It has to be analyzed closely in terms of teacher's MKT first that questions set from selection tests until now. In this research, some standards were established by type of question, grade, contents field and subject from 84 mathematics questions set at examinations. And it was analyzed concretely by general tendency and produced the results of analysis related to elementary teacher's MKT in elementary school teacher selection test since year 2000. The results showed that descriptive and short answer type was mostly set(71.4%) in type of question and integrated grade type was mostly set(41.7%) in type of grade in elementary school teacher selection test. And in type of contents field, rated from highest to lowest, number and operations(31.0%), measurement(23.8%), figure(15.5%) were set. Textbook/manual(34.5%), solution of problem(26.2%), learning psychology(13.1%) in status of subject were followed in order, but there's no relationship with estimation. This research was based on a standard of precedent study and made an analysis of elementary mathematics questions of selection test since year 2000. Therefore, it has a meaning because of produced results from analysis related to elementary teacher's MKT.

GLOBAL SHAPE OF FREE BOUNDARY SATISFYING BERNOULLI TYPE BOUNDARY CONDITION

  • Lee, June-Yub;Seo, Jin-Keun
    • Journal of the Korean Mathematical Society
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    • v.37 no.1
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    • pp.31-44
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    • 2000
  • We study a free boundary problem satisfying Bernoulli type boundary condition along which the gradient of a piecewise harmonic solution jumps zero to a given constant value. In such problem, the free boundary splits the domain into two regions, the zero set and the harmonic region. Our main interest is to identify the global shape and the location of the zero set. In this paper, we find the lower and the upper bound of the zero set. In a convex domain, easier estimation of the upper bound and faster disk test technique are given to find a rough shape of the zero set. Also a simple proof on the convexity of zero set is given for a connected zero set in a convex domain.

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Study on the Finite Element Discretization of the Level Set Redistancing Algorithm (Level Set Redistancing 알고리즘의 유한요소 이산화 기법에 대한 연구)

  • Kang Sungwoo;Yoo Jung Yul;Lee Yoon Pyo;Choi HyoungGwon
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.29 no.6 s.237
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    • pp.703-710
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    • 2005
  • A finite element discretization of the advection and redistancing equations of level set method has been studied. It has been shown that Galerkin spatial discretization combined with Crank-Nicolson temporal discretization of the advection equation of level set yields a good result and that consistent streamline upwind Petrov-Galerkin(CSUPG) discretization of the redistancing equation gives satisfactory solutions for two test problems while the solutions of streamline upwind Petrov-Galerkin(SUPG) discretization are dissipated by the numerical diffusion added for the stability of a hyperbolic system. Furthermore, it has been found that the solutions obtained by CSUPG method are comparable to those by second order ENO method.

Applying Parallel Processing Technique in Parallel Circuit Testing Application for improve Circuit Test Ability in Circuit manufacturing

  • Prabhavat, Sittiporn;Nilagupta, Pradondet
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.792-793
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    • 2005
  • Circuit testing process is very important in IC Manufacturing there are two ways in research for circuit testing improvement. These are ATPG Tool Design and Test simulation application. We are interested in how to use parallel technique such as one-side communication, parallel IO and dynamic Process with data partition for circuit testing improvement and we use one-side communication technique in this paper. The parallel ATPG Tool can reduce the test pattern sets of the circuit that is designed in laboratory for make sure that the fault is not occur. After that, we use result for parallel circuit test simulation to find fault between designed circuit and tested circuit. From the experiment, We use less execution time than non-parallel Process. And we can set more parameter for less test size. Previous experiment we can't do it because some parameter will affect much waste time. But in the research, if we use the best ATPG Tool can optimize to least test sets and parallel circuit testing application will not work. Because there are too little test set for circuit testing application. In this paper we use a standard sequential circuit of ISCAS89.

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