• Title/Summary/Keyword: serial

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LDPC Decoding by Failed Check Nodes for Serial Concatenated Code

  • Yu, Seog Kun;Joo, Eon Kyeong
    • ETRI Journal
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    • 제37권1호
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    • pp.54-60
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    • 2015
  • The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum-product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of $10^{-8}$. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.

Current Status of Automatic Serial Sections for 3D Electron Microscopy

  • Choi, Hyosun;Jung, Min Kyo;Mun, Ji Young
    • Applied Microscopy
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    • 제47권1호
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    • pp.3-7
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    • 2017
  • The automatic equipment for three-dimensional electron microscopy (3DEM) can acquire serial sections of a large sample in a relatively short time, and is especially suitable for the connectomics, which is a field related to understanding the brain structure as a whole. As many results obtained through 3DEM using automatic serial sections have been published in the field of brain research, many researchers continue to apply this technique to various samples. We reviewed the equipment for automatic serial sectioning, the block preparation method, the limitations of 3DEM, and future directions.

직·병렬연결시 리액터를 이용한 초전도 소자의 퀜치 특성 (Quench Characteristics of Superconducting Elements using Reactors at Series and Parallel Connections)

  • 최효상;임성훈;조용선;남긍현;이나영;박형민
    • 한국전기전자재료학회논문지
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    • 제18권9호
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    • pp.863-869
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    • 2005
  • We investigated quench characteristics of superconducting elements connected in series and parallel each other. The serial and parallel connections of superconducting elements causes a difficulty in simultaneous quench due to slight difference between their critical current densities. In other to induce simultaneous quench, we fabricated four type circuits; serially connected circuit before parallel connection, the circuit connected in parallel before serial connection, serially connected circuit before parallel connection with reactors, the circuit connected in Parallel before serial connection with reactors. We confirmed that the simultaneous quenches occurred in serial and parallel connections of superconducting elements using reactors. In addition, the power burden of superconducting elements was smaller than those of serial and parallel connections of superconducting elements without reactors.

공개키 암호체계를 위한 Modular 곱셈개선과 통신회로 구현에 관한 연구 (Implementation of Modular Multiplication and Communication Adaptor for Public Key Crytosystem)

  • 한선경;이선복;유영갑
    • 한국통신학회논문지
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    • 제16권7호
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    • pp.651-662
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    • 1991
  • 공개키 암호화에 대한 지수계산 방법의 개선과 serial 통신선에 실용적으로 적용하는 방법을 제시한다. RSA 형의 암호화 및 복호화 회로에 사용하기 위한 고속 modular 곱셈 알고리즘을 개선하였다. 기존의 고석 modular 곱셈 알고리즘에서 비교 과정에 사용되는 control bit 값 선정을 개선하여 부분곱과 modular 값의 비교과정에서 오류가 발생되지 않도록 하였다. 이 개선된 알고리즘은 C언어를 사용하여 작성한 simulation program에 의한 simulation을 통하여 그 정상 동작을 확인하였다. 또한 computer간의 serial 통신선에서 입력되는 serial 통신선에서 입력되는 serial data를 sampling하여 이것을 RSA방식으로 암호화하여 송신하게 되고 수신측에서는 이의 역순으로 처리하며, 이 sampling 및 암호화에 Z80 miroprocessor를 중심으로 암호회로를 설계, 제작하였다.

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스마트카드의 암호화모듈 구현에 적합한 Digit-Serial 유한체 연산기 설계 (Design of Digit-serial Circuits for Cryptography Module on Smart cards)

  • 하진석;이광엽;김원종;장준영;정교일;배영환
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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    • pp.337-340
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    • 2001
  • In this Paper, 3 digit-Serial multilier With 3 digit size of 32 is proposed, which has more advantages than the 193bit serial LFSR architecture. We give a design example for the irreducible trinomials $x^{193}$$x^{15+1}$. In hardware implementations, it is often desirable to use the irreducible trinomial equations. The proposed multiplier is verified with a VHDL description using an elliptic curve addition. The measured results show that the proposed multiplier is 0.3 times smaller than the bit-serial LFSR multiplier..

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P1394 시리얼 버스 IC의 설계 (A design of P1394 serial bus IC)

  • 이강윤;정덕균
    • 전자공학회논문지C
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    • 제35C권1호
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    • pp.34-41
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    • 1998
  • In this paper, I designed a P1394 serial bus chip as new bus interface architecture which can transmit the multimedia data at the rate of 400 Mbps and guarantee necessary bandwidth. because multimedia data become meaningless data after appropriate time, it is necessary to transfer multimedia data in real time, P1394 serial bus chip designed in this paper support isochronous transfer mode to solve this problem. Also, designed P1394 serial bus chip can transfer high quality video data or high quality audio data because it support the speed of 400 Mbps. While user must set device ID manually in previous interface such as SCSI, device ID is automatically determined if user connect each node with designed P1394 serial bus cable and power on. To design this chip, I verified the behavioral of the entrire system and synthesized layout. Also, I did layout the analog blocks and blocks which must be optimized in full custom.

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Numerical discrepancy between serial and MPI parallel computations

  • Lee, Sang Bong
    • International Journal of Naval Architecture and Ocean Engineering
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    • 제8권5호
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    • pp.434-441
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    • 2016
  • Numerical simulations of 1D Burgers equation and 2D sloshing problem were carried out to study numerical discrepancy between serial and parallel computations. The numerical domain was decomposed into 2 and 4 subdomains for parallel computations with message passing interface. The numerical solution of Burgers equation disclosed that fully explicit boundary conditions used on subdomains of parallel computation was responsible for the numerical discrepancy of transient solution between serial and parallel computations. Two dimensional sloshing problems in a rectangular domain were solved using OpenFOAM. After a lapse of initial transient time sloshing patterns of water were significantly different in serial and parallel computations although the same numerical conditions were given. Based on the histograms of pressure measured at two points near the wall the statistical characteristics of numerical solution was not affected by the number of subdomains as much as the transient solution was dependent on the number of subdomains.

A Study of I/O Serial Communication Systems Between Overground And Overhead Controllers

  • Kim, Duk-Hyun
    • 조명전기설비학회논문지
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    • 제21권4호
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    • pp.122-128
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    • 2007
  • This paper represents the Input/Output (I/O) serial communication methods between overground and overhead controllers using a programmable logic controller (PLC). In general, the systems composed by overground and overhead controllers use exclusive serial communication units. This, however, has a demerit such as a high cost as well as some restrictions of the system itself. Thus, this paper suggests methods by I/O cards for data communication between overground and overhead controllers. In this system, there is no special card and it therefore has a lower cost and is more flexible than the exclusive serial communication unit.

DCP 환경에서의 고속 Serial 네트웍 환경구현 (High Speed Serial Network Environment on DCP)

  • 박창원;정하중;전기만
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2006년도 하계학술대회
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    • pp.87-90
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    • 2006
  • Nowadays, we can enjoy access to high speed network and advanced services of convergence between broadcasting and communication anywhere and anytime through a ubiquitous computing. So, now digital convergence devices come out constantly. These devices are required faster network environment for high speed data processing than before. In this paper, we describe the design of InfiniBnad network adapter, which is included two FPGA chipsets. When this adapter is installed to Digital Convergence Platform (DCP) network performance will be improved. The adapter includes 12channel serial ports for external communication and internally, uses PCI-Express bus. We have finished the test of high speed serial based network adapter through composing complete InfiniBand network and applied fabric management software. So, we have verified that it can be applied on DCP environment.

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(225, 223) RS 부호의 직렬부호기 (A Bit-serial Encoder of (255, 223) Reed-Solomon code)

  • 조용석;이만영
    • 한국통신학회논문지
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    • 제13권5호
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    • pp.429-436
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    • 1988
  • 본 논문에서는 유한체GF($2^m$)상의 원소들을 표현하는 데 있어서 기존의 표준기지(standard basis) 표현 대신 쌍대기지(Dual basis)표현을 이용하여 GF($2^m$)상의 승산을 직렬화시킨 Berlekamp의 직렬승산 알고리즘(Bit-Serial Multiplier Algorithm)을 연구 분석하고 이를 이용하여 직렬로 동작되는 Reed-Solomon부호의 직렬부호기를 설계하였다. 또한 오류정정능력이 16인 (255, 233) Reed-Solomon부호를 택하여 이 직렬부호기를 TTL IC로 직접 장치화함으로써 이 부호기가 기존의 부호기보다 훨씬 간단한 Hardware로 장치화될 수 있음을 보였다.

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