• Title/Summary/Keyword: semiconductor process

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Correlation Analysis on Semiconductor Process Variables Using CCA(Canonical Correlation Analysis) : Focusing on the Relationship between the Voltage Variables and Fail Bit Counts through the Wafer Process (CCA를 통한 반도체 공정 변인들의 상관성 분석 : 웨이퍼검사공정의 전압과 불량결점수와의 관계를 중심으로)

  • Kim, Seung Min;Baek, Jun-Geol
    • Journal of Korean Institute of Industrial Engineers
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    • v.41 no.6
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    • pp.579-587
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    • 2015
  • Semiconductor manufacturing industry is a high density integration industry because it generates a vest number of data that takes about 300~400 processes that is supervised by numerous production parameters. It is asked of engineers to understand the correlation between different stages of the manufacturing process which is crucial in reducing production costs. With complex manufacturing processes, and defect processing time being the main cause. In the past, it was possible to grasp the corelation among manufacturing process stages through the engineer's domain knowledge. However, It is impossible to understand the corelation among manufacturing processes nowadays due to high density integration in current semiconductor manufacturing. in this paper we propose a canonical correlation analysis (CCA) using both wafer test voltage variables and fail bit counts variables. using the method we suggested, we can increase the semiconductor yield which is the result of the package test.

Study of Boron Doping Feasibility with Atmospheric Pressure Plasma for p-n Junction Formation on Silicon Wafer for Semiconductor (p-n 접합 형성을 위한 반도체 실리콘 웨이퍼 대기압 플라즈마 붕소 확산 가능성 연구)

  • Kim, Woo Jae;Lee, Hwan Hee;Kwon, Hee Tae;Shin, Gi Won;Yang, Chang Sil;Kwon, Gi-Chung
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.4
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    • pp.20-24
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    • 2017
  • Currently, techniques mainly used in semiconductor impurity diffusion processes include furnace thermal diffusion, ion implantation, and vacuum plasma doping. However, there is a disadvantage that the process equipment and the unit cost are expensive. In this study, boron diffusion process using relatively inexpensive atmospheric plasma was conducted to solve this problem. With controlling parameters of Boron diffusion process, the doping characteristics were analyzed by using secondary ion mass spectrometry. As a result, the influence of each variable in the doping process was analyzed and the feasibility of atmospheric plasma doping was confirmed.

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Evaporation Process Modeling for Large OLED Mass-fabrication System (대면적 유기EL 양산 장비 개발을 위한 증착 공정 모델링)

  • Lee, Eung-Ki
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.4 s.17
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    • pp.29-34
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    • 2006
  • In order to design an OLED(Organic Luminescent Emitting Device) evaporation system, geometric simulation of film thickness distribution profile is required. For the OLED evaporation process, thin film thickness uniformity is of great practical importance. In this paper, a geometric modeling algorithm is introduced for process simulation of the OLED evaporating process. The physical fact of the evaporating process is modeled mathematically. Based on the developed method, the thickness of the thin-film layer can be successfully controlled.

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반도체 Package 용 Seam Seal Welding System 개발

  • 이우영;진경복;오자환;김경수
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2003.05a
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    • pp.34-39
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    • 2003
  • Seam seal welding on the semi-conductor package is a process for sealing the packages of semiconductors, crystal parts, saw filters, oscillators with lid plate by seam welding. This paper present the development process of automatic seam seal welding system. In this process, the process algorithm, high precision welding current control, design of welding head, high speed and high precision feeding mechanism, user interface process control program technologies are included.

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A Study of Strategy for Planning of Rework in Semiconductor Monitoring Burn-in Test Process (반도체 MBT 공정의 Rework 제품 투입결정에 관한 연구)

  • Lee, Do-Hoon;Ko, Hyo-Heon;Kim, Sung-Shick
    • IE interfaces
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    • v.18 no.3
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    • pp.350-360
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    • 2005
  • This paper considers a strategy for planning of rework in semiconductor monitoring burn-in test process. The equipment error in monitoring burn-in test process generates many defects. These defects are transformed into good products by rework process, i.e. retest. Rework has the advantage of saving production costs. But rework increases holding costs and incurs rework costs. In monitoring burn-in test process, rework depends on operator's experience with no pre-defined specification. In practice, a number of rework activities are performed with respect to the product importance and inventory quantity. Moreover, disregard for order jobs schedule have caused due date penalties. So a strategy for planning of rework by which order jobs schedule are not affected is suggested. Futhermore, production costs, rework costs and inventory costs for planning of rework are considered.

Gas Barrier Properties of Nanolaminated Single Inorganic Film Deposited by Neutral Beam Assisted Sputtering Process

  • Jang, Yun-Sung;Lee, You-Jong;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.465-465
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    • 2012
  • In this study, we developed an Al2O3 nanolaminated single gas barrier layer using a Neutral Beam Assisted Sputtering (NBAS) process. The NBAS process can continuously change crystalline structures from an amorphous phase to a nanocrystal phase with various grain sizes and lead to the formation of a nanolaminated structure in the single inorganic thin film. As a result, the water vapor transmission rates (WVTR) of the nanolaminated Al2O3 thin films by NBAS process have improved more than 40% compared with that of conventional Al2O3 layers by the RF magnetron sputtering process under the same sputtering conditions.

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Numerical Analysis of Pressure and Temperature Effects on Residual Layer Formation in Thermal Nanoimprint Lithography

  • Lee, Ki Yeon;Kim, Kug Weon
    • Journal of the Semiconductor & Display Technology
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    • v.12 no.2
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    • pp.93-98
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    • 2013
  • Nanoimprint lithography (NIL) is a next generation technology for fabrication of micrometer and nanometer scale patterns. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. To successfully imprint a nanosized pattern with the thermal NIL, the process conditions such as temperature and pressure should be appropriately selected. This starts with a clear understanding of polymer material behavior during the thermal NIL process. In this paper, a filling process of the polymer resist into nanometer scale cavities during the thermal NIL at the temperature range, where the polymer resist shows the viscoelastic behaviors with consideration of stress relaxation effect of the polymer. In the simulation, the filling process and the residual layer formation are numerically investigated. And the effects of pressure and temperature on NIL process, specially the residual layer formation are discussed.

Study of defect characteristics by electrochemical plating thickness in copper CMP (Copper CMP에서 Electrochemical Plating 두께에 따른 Defect 특성 연구)

  • Kim, Tae-Gun;Kim, Nam-Hoon;Kim, Sang-Yong;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.125-126
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    • 2005
  • Recently semiconductor devices are required more smaller scale and more powerful performance. For smaller scale of device, multilayer structure is proposed. And, for the higher performance, interconnection material is change to copper, because copper has high EM(Electro-migration)and low resistivity. Then copper CMP process is a great role in a multilayer formation of semiconductor. Copper process is different from aluminum process. ECP process is one of the copper processes. In this paper, we focused on the defects tendency by copper thickness which filled using ECP process. we observed hump high and dishing. Conclusively, hump hight reduced at copper thickness increased Also dishing reduced.

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A Study on the Development of AMESim Model for Construction of Cooling System for Semiconductor Etching Process (반도체 식각 공정용 냉각 시스템 구축을 위한 AMESim 모델 개발)

  • Kim, Daehyeon;Kim, Kwang-Sun
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.3
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    • pp.106-110
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    • 2017
  • Due to the plasma applied from the outside, which acts as an etchant during the etching process, considerable heat is transferred to the wafer and a separate cooling process is performed to effectively remove the heat after the process. In this case, a direct cooling method using a refrigerant is suitable for cooling through effective heat exchange. The direct cooling method using the refrigerant using the latent heat exchange is superior to the cooling method using the sensible heat exchange. Therefore, in this paper, AMESim is used to design a direct refrigerant cooling system using latent heat exchange simulator was built.The constructed simulator is reliable compared with the actual experimental results. It is expected that this simulator will help to design and search for optimal process conditions.

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OES based PECVD Process Monitoring Accuracy Improvement by IR Background Signal Subtraction from Emission Signal (적외선 배경신호 처리를 통한 OES 기반 PECVD공정 모니터링 정확도 개선)

  • Lee, Jin Young;Seo, Seok Jun;Kim, Dae-Woong;Hur, Min;Lee, Jae-Ok;Kang, Woo Seok
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.1
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    • pp.5-9
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    • 2019
  • Optical emission spectroscopy is used to identify chemical species and monitor the changes of process results during the plasma process. However, plasma process monitoring or fault detection by using emission signal variation monitoring is vulnerable to background signal fluctuations. IR heaters are used in semiconductor manufacturing chambers where high temperature uniformity and fast response are required. During the process, the IR lamp output fluctuates to maintain a stable process temperature. This IR signal fluctuation reacts as a background signal fluctuation to the spectrometer. In this research, we evaluate the effect of infrared background signal fluctuation on plasma process monitoring and improve the plasma process monitoring accuracy by using simple infrared background signal subtraction method. The effect of infrared background signal fluctuation on plasma process monitoring was evaluated on $SiO_2$ PECVD process. Comparing the $SiO_2$ film thickness and the measured emission line intensity from the by-product molecules, the effect of infrared background signal on plasma process monitoring and the necessity of background signal subtraction method were confirmed.