• 제목/요약/키워드: semiconductor materials quality

검색결과 147건 처리시간 0.024초

Characteristics of hybrid mask mold for combined nanoimprint and photolithography technique

  • MOON KANSHUN;CHOI BANGLIM;PARK IN-SUNG;HONG SUNSHUM;YANG KIHYUN;LEE HEON;AHN JINHO
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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    • pp.147-150
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    • 2005
  • We process a novel approach cal led combined nanoimprint and photolithography (CNP) to greatly simplify the fabrication in conventional nanoimprint lithography (NIL). In this study, a novel HMM with anti-sticking $SiO_2$ layer is introduced to improve the quality of transferred pattern. The surface property was investigated using contact angle measurement and spectrophotometer. Replicate pattern with CNP using HMM showed complete pattern transfer without defect.

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SiO2/Al2O3 적층 감지막의 두께 최적화를 통한 고성능 Electrolyte-insulator-semiconductor pH 센서의 제작 (Thickness Optimization of SiO2/Al2O3 Stacked Layer for High Performance pH Sensor Based on Electrolyte-insulator-semiconductor Structure)

  • 구자경;장현준;조원주
    • 한국전기전자재료학회논문지
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    • 제25권1호
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    • pp.33-36
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    • 2012
  • In this study, the thickness effects of $Al_2O_3$ layer on the sensing properties of $SiO_2/Al_2O_3$ (OA) stacked membrane were investigated using electrolyte-insulator-semiconductor (EIS) structure for high quality pH sensor. The $Al_2O_3$ layers with a respective thickness of 5 nm, 15 nm, 23 nm, 50 nm, and 100 nm were deposited on the 5-nm-thick $SiO_2$ layers. The electrical characteristics and sensing properties of each OA membranes were investigated using metal-insulator-semiconductor (MIS) and EIS devices, respectively. As a result, the OA stacked membrane with 23-nm-thick $Al_2O_3$ layer shows the excellent characteristics as a sensing membrane of EIS sensor, which can enhance the signal to noise ratio.

A New Method for the Determination of Carrier Lifetime in Silicon Wafers from Conductivity Modulation Measurements

  • Elani, Ussama A.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권4호
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    • pp.311-317
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    • 2008
  • The measurement of dark ${\sigma}_D$, gamma-induced ${\sigma}_{\gamma}$ conductivities and the expected conductivity modulation ${\Delta}_{\sigma}$ in silicon wafers/samples is studied for developing a new technique for carrier lifetime evaluation. In this paper a simple method is introduced to find the carrier lifetime variations with the measured conductivity and conductivity modulation under dark and gamma irradiation conditions. It will be concluded that this simple method enables us to give an improved wafer evaluation, processing and quality control in the field of photovoltaic materials and other electronic devices.

Graphene field-effect transistor for radio-frequency applications : review

  • Moon, Jeong-Sun
    • Carbon letters
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    • 제13권1호
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    • pp.17-22
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    • 2012
  • Currently, graphene is a topic of very active research in fields from science to potential applications. For various radio-frequency (RF) circuit applications including low-noise amplifiers, the unique ambipolar nature of graphene field-effect transistors can be utilized for high-performance frequency multipliers, mixers and high-speed radiometers. Potential integration of graphene on Silicon substrates with complementary metal-oxide-semiconductor compatibility would also benefit future RF systems. The future success of the RF circuit applications depends on vertical and lateral scaling of graphene metal-oxide-semiconductor field-effect transistors to minimize parasitics and improve gate modulation efficiency in the channel. In this paper, we highlight recent progress in graphene materials, devices, and circuits for RF applications. For passive RF applications, we show its transparent electromagnetic shielding in Ku-band and transparent antenna, where its success depends on quality of materials. We also attempt to discuss future applications and challenges of graphene.

Synthesis and Quality of Cr-doped AIN Thin Films Grown by RF Sputtering

  • Quang, Pham Hong;Hung, Tran Quang;Dai, Ngo Xuan;Thanh, Tran Hoai;Kim, Cheol-Gi
    • Journal of Magnetics
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    • 제12권4호
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    • pp.149-151
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    • 2007
  • The AlCrN films were grown by RF reactive sputtering method under the selected conditions. The Cr concentration was varied by the number of Cr pieces placed on the Al target. The sample quality has been studied by XRD, Auger spectroscopy, optical absorption and electrical resistant measurements. The XRD and Auger results show that the samples consist of a major phase with the $Al_{1-x}Cr_xN$ formula, which has a hexagonal structure, and a few percents at. of oxygen, which may form $Al_2O_3$. There exist the Cr clusters in the samples with high concentration of Cr. The optical absorption measurement provides the information about the band gap that relates strongly to the quality of samples. The quality of samples is also clearly reflected in electrical measurement, i.e., the temperature dependence of resistance exhibits a semiconductor characteristic only for the samples that have no Cr cluster. In these cases, the values of ionization energies $E_a$ can be derived from R(T) plots by using the function R(T) = Ro exp $(E_a/k_BT)$.

Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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반도체 플라즈마 식각 장치의 부품 가공 연구 (A Study of Machining Optimization of Parts for Semiconductor Plasma Etcher)

  • 이은영;김문기
    • 반도체디스플레이기술학회지
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    • 제19권4호
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    • pp.28-33
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    • 2020
  • Plasma etching process employs high density plasma to create surface chemistry and physical reactions, by which to remove material. Plasma chamber includes silicon-based materials such as a focus ring and gas distribution plate. Focus ring needs to be replaced after a short period. For this reason, there is a need to find materials resistant to erosion by plasma. The developed chemical vapor deposition processing to produce silicon carbide parts with high purity has also supported its widespread use in the plasma etch process. Silicon carbide maintains mechanical strength at high temperature, it have been use to chamber parts for plasma. Recently, besides the structural aspects of silicon carbide, its electrical conductivity and possibly its enhanced life time under high density plasma with less generation of contamination particles are drawing attention for use in applications such as upper electrode or focus rings, which have been made of silicon for a long time. However, especially for high purity silicon carbide focus ring, which has usually been made by the chemical vapor deposition method, there has been no study about quality improvement. The goal of this study is to reduce surface roughness and depth of damage by diamond tool grit size and tool dressing of diamond tools for precise dimensional assurance of focus rings.

입자추적 유동해석을 이용한 초음파분무화학기상증착 균일도 예측 연구 (Uniformity Prediction of Mist-CVD Ga2O3 Thin Film using Particle Tracking Methodology)

  • 하주환;박소담;이학지;신석윤;변창우
    • 반도체디스플레이기술학회지
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    • 제21권3호
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    • pp.101-104
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    • 2022
  • Mist-CVD is known to have advantages of low cost and high productivity compared to ALD and PECVD methods. It is capable of reacting to the substrate by misting an aqueous solution using ultrasonic waves under vacuum-free conditions of atmospheric pressure. In particular, Ga2O3 is regarded as advanced power semiconductor material because of its high quality of transmittance, and excellent electrical conductivity through N-type doping. In this study, Computational Fluid Dynamics were used to predict the uniformity of the thin film on a large-area substrate. And also the deposition pattern and uniformity were analyzed using the flow velocity and particle tracking method. The uniformity was confirmed by quantifying the deposition cross section with an FIB-SEM, and the consistency of the uniformity prediction was secured through the analysis of the CFD distribution. With the analysis and experimental results, the match rate of deposition area was 80.14% and the match rate of deposition thickness was 55.32%. As the experimental and analysis results were consistent, it was confirmed that it is possible to predict the deposition thickness uniformity of Mist-CVD.

새로운 $TiSi_2$ 형성방법과 STI를 이용한 초박막 게이트 산화막의 특성 개선 연구 (Study of Improvement of Gate Oxide Quality by Using an Advanced, $TiSi_2$ process & STI)

  • 엄금용;오환술
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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    • pp.41-44
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    • 2000
  • Ultra large scale integrated circuit(ULSI) & complementary metal oxide semiconductor(CMOS) circuits require gate electrode materials such as meta] silicides, titanium-silicide for gate oxides. Many previous authors have researched the improvements sub-micron gate oxide quality. However, little has been done on the electrical quality and reliability of ultra thin gates. In this research, we recommend novel shallow trench isolation structure and two step TiSi$_{2}$ formation for sub 0.1${\mu}{\textrm}{m}$ gate oxide.

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