• Journal of the Semiconductor & Display Technology
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• v.2 no.3
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• pp.1-6
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• 2003

In the rapid changes of the semiconductor manufacturing technologies for early 21st century, it may be safely said that a kernel of terms is the size increase of Si wafer and the size decrease of semiconductor devices. As the size of Si wafers increases and semiconductor device is miniaturized, the units of cleaning processes increase. A present cleaning technology is based upon RCA cleaning which consumes vast chemicals and ultra pure water (UPW) and is the high temperature process. Therefore, this technology gives rise to environmental issue. To resolve this matter, candidates of advanced cleaning processes have been studied. One of them is to apply the electrolyzed water. In this work, electrolyzed water cleaning was compared with various chemical cleaning, using Si wafer surfaces by changing cleaning temperature and cleaning time, and especially, concentrating upon the contact angle. It was observed that contact angle on surface treated with Electrolyzed water cleaning was $4.4^{\circ}$ without RCA cleaning. Amine series additive of high pKa (negative logarithm of the acidity constant) was used to observe the property changes of cathode water.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.79-80
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• 2007

Copper has been used as an interconnect material in the fabrication of semiconductor devices, because of its higher electrical conductivity and superior electro-migration resistance. Chemical mechanical polishing (CMP) technique is required to planarize the overburden Cu film in an interconnect process. Various problems such as dishing, erosion, and delamination are caused by the high pressure and chemical effects in the Cu CMP process. But these problems have to be solved for the fabrication of the next generation semiconductor devices. Therefore, new process which is electro-chemical mechanical planarization/polishing (ECMP) or electro-chemical mechanical planarization was introduced to solve the. technical difficulties and problems in CMP process. In the ECMP process, Cu ions are dissolved electrochemically by the applying an anodic potential energy on the Cu surface in an electrolyte. And then, Cu complex layer are mechanically removed by the mechanical effects between pad and abrasive. This paper focuses on the manufacturing of ECMP system and its process. ECMP equipment which has better performance and stability was manufactured for the planarization process.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.72-75
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• 2023

Carbon neutrality has been emerged as important mission for all the manufacturing industry to reduce energy usage and carbon emission equivalent. Korean semiconductor and display manufacturing industries are also in huge interest by minimize the energy usage as well as to find a less global warming product gases in both etch and cleaning. In addition, Korean government is also investing long term research and development plan for the safe environment in various ways. In this paper, we revisit previous research activities on carbon emission equivalent and current research activities performed in semiconductor process diagnosis research center at Myongji University with respect to the reduction of NF3 usage for the PECVD chamber cleaning, and we present the analytical result of the exhaust gas with residual gas analysis in both 6 inches and 12 inches PECVD equipment. The presented result can be a reference study of the development of new substitution gas in near future to compare the cleaning rate of the silicon oxide deposition chamber.

• Journal of the Korean institute of surface engineering
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• v.57 no.3
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• pp.208-213
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• 2024

With the development of industry, miniaturization and densification of semiconductor components are rapidly progressing. Particularly, as demand surges across various sectors, efficiency in productivity has emerged as a crucial issue in semiconductor component manufacturing. Maximizing semiconductor productivity requires real-time monitoring of semiconductor processes and continuous reflection of the results to stabilize processes. However, various unexpected variables and errors in judgment that occur during the process can cause significant losses in semiconductor productivity. Therefore, while the development of a reliable manufacturing system is important, the importance of developing sensor technology that can complement this and accurately monitor the process is also growing. In this study, conducted a basic research on the concept of diagnostic sensors for thickness based on the physical changes of thin films due to etching. It observed changes in resistance corresponding to variations in thin film thickness as etching processes progressed, and conducted research on the correlation between these physical changes and thickness variations. Furthermore, to assess the reliability of thin film thickness measurement sensors, it conducted multiple measurements and comparative analyses of physical changes in thin films according to various thicknesses.

• Clean Technology
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• v.5 no.1
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• pp.62-77
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• 1999

Semiconductor industry has rapidly grown because of the need from electronic and computer industries. However the global environmental regulations for various hazardous chemical compounds, which are indispensably used in semiconductor manufacturing process, are getting stronger. The semiconductor industries should develop the cleaner technologies in order to both lead the future world market and avoid the regulations form environmentally developed countries. In this paper, cleaner technologies for semiconductor cleaning processes are surveyed, such as gas phase process, UV process, and plasma process. Advantages and disadvantages of these processes are discussed.

• IE interfaces
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• v.22 no.2
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• pp.126-134
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• 2009

As product quality and yield are essential factors in semiconductor manufacturing, monitoring the main manufacturing steps is a critical task. For the purpose, FDC(Fault detection and classification) is used for diagnosing fault states in the processes by monitoring data stream collected by equipment sensors. This paper proposes an FDC model based on decision tree which provides if-then classification rules for causal analysis of the processing results. Unlike previous decision tree approaches, we reflect the structural aspect of the data stream to FDC. For this, we segment the data stream into multiple subregions, define structural features for each subregion, and select the features which have high relevance to results of the process and low redundancy to other features. As the result, we can construct simple, but highly accurate FDC model. Experiments using the data stream collected from etching process show that the proposed method is able to classify normal/abnormal states with high accuracy.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.9
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• pp.4467-4471
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• 2013

In this research, developed full-scan photoresist coating system(FPCS) can improve the efficiency of the photoresist coating system essential for spinner equipment in nano semiconductor manufacturing process. The devices developed in this research, which can be swiftly replaced in case abnormal state element changes or wafer manufacturing defect occurs, are anticipated to improve module yield as well as real-time monitoring on the state element in order to prevent the complex process defect due to the photoresist miss coating.

• Journal of the Korea Safety Management & Science
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• v.6 no.4
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• pp.155-170
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• 2004

Among the semiconductor If-chips, unlike memory chips, a majority of Application Specific IC(ASIC) products are produced by customer orders, and meeting the customer specified due date is a critical issue for the case. However, to the one who understands the nature of semiconductor manufacturing, it does not take much effort to realize the difficulty of meeting the given specific production due dates. Due to its multi-layered feature of products, to be completed, a semiconductor product(called device) enters into the fabrication manufacturing process(FAB) repeatedly as many times as the number of the product specified layers, and fabrication processes of individual layers are composed with similar but not identical unit processes. The unit process called photo-lithography is the only process where every layer must pass through. This re-entrant feature of FAB makes predicting and planning of due date of an ordered batch of devices difficult. Parallel machines problem in the photo process, which is bottleneck process, is solved with restricted roll out algorithm. Roll out algorithm is a method of solving the problem by embedding it within a dynamic programming framework. Restricted roll out algorithm Is roll out algorithm that restricted alternative states to decrease the solving time and improve the result. Results of simulation test in condition as same as real FAB facilities show the effectiveness of the developed algorithm.

• IE interfaces
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• v.10 no.1
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• pp.15-22
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• 1997

In semiconductor manufacturing, the probe process between fabrication and assembly process is constrained mostly by the equipment capacity because most products pass through the similar procedures. The probe process is usually performed in a batch mode with relatively short cycle times. The capability of the probe process can be determined by the optimal combination of the equipments and the products. A probe line usually has several types of equipment with different capacity. In this study, the probe line is modeled in terms of capacity to give the efficient planning and control procedure. For the practical usage, the hierarchical capacity planning procedure is used. First, a monthly capacity plan is made to meet the monthly production plan of each product. Secondly, the daily capacity planning is performed by considering the monthly capacity plan and the daily fabrication output. Simple heuristic algorithms for daily capacity planning are developed and some experimental results are shown.

• Journal of the Korea Safety Management & Science
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• v.15 no.1
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• pp.199-207
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• 2013

Domestic semiconductor industry grew rapidly enough to draw a close attention in a short period less than twenty years. Korea grew to be the third largest semiconductor manufacturing country in the world during the period and has maintained the proud of Koreans even in technological competitiveness. Accordingly, In this study, it was introduced and analyzed 6 sigma method using profits making analysis for increasing Productivity in the semiconductor manufacturing process.