• Title/Summary/Keyword: rounding error

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Maximum Error Reduction for Fixed-width Modified Booth Multipliers Based on Error Bound Analysis (오차범위 분석을 통한 고정길이 modified Booth 곱셈기의 최대오차 감소)

  • Cho, Kyung-Ju;Chung, Jin-Gyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.29-34
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    • 2005
  • The maximum quantization error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, we analyze the error bound of fixed-width modified Booth multipliers. Then, the estimation method for the number of additional columns for fixed-width multipliers is proposed to limit the maximum quantization error within a desired bound. In addition, it is shown that our methodology can be extended to reduced-width multipliers. By simulations, it is shown that the proposed error analysis method is useful to the practical design of fixed-width modified Booth multipliers.

A New Method for Thumbnail Extraction in H.264/AVC Bitstreams (H.264/AVC 비트스트림에서 썸네일 추출을 위한 새로운 방법)

  • Hong, Seung-Hwan;Kim, Ji-Eon;Chin, Young-Min;Kwon, Jae-Cheol;Oh, Seoung-Jun
    • Journal of Broadcast Engineering
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    • v.15 no.6
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    • pp.853-867
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    • 2010
  • Recently, thumbnail techniques are required to index a high-performance video at digital convergence-based multimedia service like IPTV and DMB. Therefore a thumbnail extraction method in H.264/AVC bitstreams has been proposed. However, thumbnail quality deterioration problem at converting the general equation of spatial domain to frequency domain which is generated by not considering about H.264/AVC transform and quantization processing and rounding-off operation in intra prediction. In this paper, we propose a new thumbnail extraction method in H.264/AVC bitstreams. The proposed scheme is based on H.264/AVC core-transform for a thumbnail extraction in frequency domain, and probability theory, intra rounding-off error compensation. Through the implementation and performance evaluation, the subjective quality difference between the output of our scheme and the output of reference decoder is negligible and better than the conventional method, and moreover PSNR gain by up to 8.66 dB.

ON APPROXIMATIONS BY IRRATIONAL SPLINES

  • LEVIN, MIKHAIL P.
    • Journal of the Korean Society for Industrial and Applied Mathematics
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    • v.5 no.1
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    • pp.47-53
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    • 2001
  • A problem of approximation by irrational splines is considered. These splines have a constant curvature between interpolation nodes and need only one additional boundary condition for derivatives, which should be set only at one of two boundary nodes, that is impossible for usual polynomial splines required boundary conditions at both boundary nodal points. Some estimations for numerical differentiation and rounding error analysis are presented.

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Fixed-Width Booth-folding Squarer Design (고정길이 Booth-Folding 제곱기 디자인)

  • Cho Kyung-Ju;Chung Jin-Gyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.8C
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    • pp.832-837
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    • 2005
  • This paper presents a design method for fixed-width squarer that receives a W-bit input and produces a W-bit squared product. To efficiently compensate for the quantization error, modified Booth encoder signals (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups (major/minor group) depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the performance of the proposed method is close to that of the rounding method and much better than that of the truncation method and conventional method. It is also shown that the proposed method leads to up to $28\%\;and\;27\%$ reduction in area and power consumption compared with the ideal squarers, respectively.

Conversion Method of 3D Point Cloud to Depth Image and Its Hardware Implementation (3차원 점군데이터의 깊이 영상 변환 방법 및 하드웨어 구현)

  • Jang, Kyounghoon;Jo, Gippeum;Kim, Geun-Jun;Kang, Bongsoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.10
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    • pp.2443-2450
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    • 2014
  • In the motion recognition system using depth image, the depth image is converted to the real world formed 3D point cloud data for efficient algorithm apply. And then, output depth image is converted by the projective world after algorithm apply. However, when coordinate conversion, rounding error and data loss by applied algorithm are occurred. In this paper, when convert 3D point cloud data to depth image, we proposed efficient conversion method and its hardware implementation without rounding error and data loss according image size change. The proposed system make progress using the OpenCV and the window program, and we test a system using the Kinect in real time. In addition, designed using Verilog-HDL and verified through the Zynq-7000 FPGA Board of Xilinx.

Digital Down Converter System improving the computational complexity (복잡도를 개선한 Digital Down Converter 시스템)

  • Moon, Ki-Tak;Hong, Moo-Hyun;Lee, Joung-Seok;Kim, Kyung-Seok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.10 no.3
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    • pp.11-17
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    • 2010
  • Multi-standard, multi-band, multi-service system to ensure a flexible interface between the SDR (Software Defined Radio) technology for the implementation of the Stability and Low-Power, Low-Calcualrion DDC (Digital Down Conversion) technology is essential. DDC technology consists of a digital channel filter. This is a typical digital filter because of the limited fisheries are vulnerable to overflow and rounding errors are drawbacks. In this paper, we overcome this disadvantage, we propose the structure of the DDC. The way WDF (Wave Digital Filter) Structural rounding error due to the structural resistance to noise. Therefore, This is the useful structure when the filter coefficients's word length is short. In addition, since IIR filters based on FIR filters based on the amount of computation is reduced because fewer than filter's tap. The proposed structure is used in DDC that CIC (Cascaded Integrator Comb) filter, WDF, IFOP (Interpolated Fourth-Order Polynomials) were analyzed with respect to, the results were confirmed by computer simulation.

A Novel Position Sensorless Speed Control Scheme for Permanent Magnet Synchronous Motor Drives

  • Won, Tae-Hyun;Lee, Man-Hyung
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.2B no.3
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    • pp.125-132
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    • 2002
  • PMSMS (permanent magnet synchronous motors) are widely used in industrial applications and home appliances because of their high torque to inertia ratio, superior power density, and high efficiency. For high performance control, accurate informations about the rotor position is essential. Sensorless algorithms have lately been studied extensively due to the high cost of position sensors and their low reliability in harsh environments. A novel position sensorless speed control for PMSMs uses indirect flux estimation and is presented in this paper. Rotor position and angular velocity are estimated by the proposed indirect flux estimation. Linkage flux and magnetic field flux are calculated by the voltage equations and the measured phase current without any integration. Instead of linkage flux calculation with integral operation, indirect flux and differential magnetic field are used for the estimation of rotor position. A proper rejection technique fur current noise effect in the calculation of differential linkage flux is introduced. The proposed indirect flux detecting method is free from the integral rounding error and linkage flux drift problem, because differential linkage flux can be calculated without any integral operation. Furthermore, electrical parameters of the PMSM can be measured by the proposed TCM (time compression method) for soft starting and precise estimation of rotor position. The position estimator uses accurate electrical parameters that are obtained from the proposed TCM at starting strategy. In the operating region, a proper compensation method fur temperature effect can compensate fir the estimation error from the variation of electrical parameters. The proposed novel position sensorless speed control scheme is verified by the experimental results.

Analysis of Some Strange Behaviors of Floating Point Arithmetic using MATLAB Programs (MATLAB을 이용한 부동소수점 연산의 특이사항 분석)

  • Chung, Tae-Sang
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.2
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    • pp.428-431
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    • 2007
  • A floating-point number system is used to represent a wide range of real numbers using finite number of bits. The standard the IEEE adopted in 1987 divides the range of real numbers into intervals of [$2^E,2^{E+1}$), where E is an Integer represented with finite bits, and defines equally spaced equal counts of discrete numbers in each interval. Since the numbers are defined discretely, not only the number representation itself includes errors but in floating-point arithmetic some strange behaviors are observed which cannot be agreed with the real world arithmetic. In this paper errors with floating-point number representation, those with arithmetic operations, and those due to order of arithmetic operations are analyzed theoretically with help of and verification with the results of some MATLAB program executions.

EFFICIENT LATTICE REDUCTION UPDATING AND DOWNDATING METHODS AND ANALYSIS

  • PARK, JAEHYUN;PARK, YUNJU
    • Journal of the Korean Society for Industrial and Applied Mathematics
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    • v.19 no.2
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    • pp.171-188
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    • 2015
  • In this paper, the efficient column-wise/row-wise lattice reduction (LR) updating and downdating methods are developed and their complexities are analyzed. The well-known LLL algorithm, developed by Lenstra, Lenstra, and Lov${\acute{a}}$sz, is considered as a LR method. When the column or the row is appended/deleted in the given lattice basis matrix H, the proposed updating and downdating methods modify the preconditioning matrix that is primarily computed for the LR with H and provide the initial parameters to reduce the updated lattice basis matrix efficiently. Since the modified preconditioning matrix keeps the information of the original reduced lattice bases, the redundant computational complexities can be eliminated when reducing the lattice by using the proposed methods. In addition, the rounding error analysis of the proposed methods is studied. The numerical results demonstrate that the proposed methods drastically reduce the computational load without any performance loss in terms of the condition number of the reduced lattice basis matrix.

Registration of Multiple CT Images Using Principal Axis-based Rigid Body Transformation (주축기반 강체변환을 이용한 다중 CT 영상의 정합)

  • 유선국;김용욱;이혜연;김희중;김기덕;김남현
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.52 no.8
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    • pp.500-505
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    • 2003
  • In this paper, the method to register multiple sets of skull CT images to absolute coordinate system is proposed. Contrary to correspondence paired mapping of previous techniques, four anatomical landmark points, three coplanar points and one non-coplanar point, compose three principal axes simple and unique for efficient registration by means of rigid body transformation. Throughout the numerical simulation with added random noises, the error performances in terms of different rotation and rounding-off of landmark points, and incorrect localization of anatomical landmark and target points are quantitatively analyzed to generalize the proposed technique. Experiments using real skull CT images demonstrate the feasibility for an efficient use in clinical practice.