• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.846-853
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• 2004

This paper introduces implementation of a traffic distributed processing system on the Web Sever Networking. The study used two software packages （Packet Capture and Round-Robin Test Package） to check packet quantity from Virtual Network Structure (data generator, virtual server, Serve. 1, 2, 3), and could find out traffic distribution toward Server 1, 2, and 3. The functions of implemented Round-Robin Load Balancing Monitoring System include Round-Robin testing, system monitoring, and graphical indication of data transmission/packet quantity (figures ＆ diagram). As the result of the study shows, Round-Robin Algorithm ensured definite traffic distribution, unless incoming data loads differ much. Although error levels were high in some cases, they were eventually alleviated by repeated tests for a long period of time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.9C
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• pp.836-841
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• 2002

Packet scheduling is an essential function to guarantee a quality of service by differentiating services in the Internet. Scheduling algorithms that have been suggested so far can be devided into Round-Robin methods and Fair Queueing methods Round-Robin methods have the advantage of high-speed processing through simple implementations, while Fair Queueing methods offer accurate services. Fair queueing algorithms, however, have problems of computational overheads and implementation complexity as their schedulers manage the states of every flow. This paper suggests a new method in which each flow performs the calculation in a distributed way to decide the service order. Our algorithm significantly reduces the scheduler's computational overheads while providing the same level of accuracy with the previous Fair Queueing algorithms.

• Journal of Korea Multimedia Society
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• v.5 no.3
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• pp.323-330
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• 2002

Recently, the existing embedded real-time operating systems(RTOSs) are being developed in terms of various modified versions in every application fields. Major characteristics and difference of these OSs lie in their distinct development of mechanisms which can be used in various environment and task-scheduling function which can control time-limited contingencies. In this paper, we design and implement round/robin scheduling algorithm based on time-sharing with equal-priority for multiple tasks which are provided preemptive and priority task allocation function in $\mu{C/OS-II}$ version 2.03. We propose the most important event-ready list structure in $\mu{C/OS-II}$; kernel, and provide the running result for multiple tasks with equal priority for the proposed structure.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.8
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• pp.1653-1658
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• 2009

SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM, SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. In this study, we compare the characteristics of various arbitration policies using TLM(Transaction Level Model) method. Fixed priority, round-robin, TDMA and Lottery bus policies are used in general arbitration method. We analyze the merit and demerit of these arbitration policies.

• Journal of KIISE:Information Networking
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• v.28 no.4
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• pp.631-640
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• 2001

Round robin scheduling discipline, which is a sort of frame-based scheduling, is quite simple and straightforward for handling multiple queues, and by putting a different weight on each queue, a network can offer differentiated services such as different bandwidth, or delay bound. The most typical algorithm among this disciplines is the weighted round robin(WRR). Also, WRR algorithm can be implemented efficiently by dynamic binary scheduling wheel(DBSW) architecture. This paper performs the analysis of the DBSW architecture and compares the results with simulation results. The analysis data and simulation data show that the DBSW structure decreases average buffer length because it is capable of maintaining the allocated weight of each VC correctly.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.3 s.357
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• pp.41-50
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• 2007

In this paper, a new Dual Round-Robin (DRR) based iterative SLIP (iSLIP) scheduling scheme, called DiSLIP is proposed for IP switching systems. By using DRR followed by iSLIP, DiSLIP can exploit desynchronization effect of DRR and high performance of iSLIP, while the drawbacks of two schemes are minimized. 'Through computer simulation, we verify the switch throughput and total waiting time of the proposed scheme under nonuniform and correlated self-similar traffic. Moreover, the proposed scheme can considerably reduce the complexity of parallel matching logics compared to iSLIP. From the result, we observe that the proposed scheme outperforms DRR on throughput as well as iSLIP schemes on complextiy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.50-56
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• 2009

SoC(System on a Chip) has several masters, slaves, arbiter and decoder in bus architecture. Master initiates the data transactions like CPU, DMA and DSP and slave responses the data transactions like SRAM SDRAM and register. Furthermore, as multiple masters can't use a bus concurrently, arbiter plays an role in bus arbitration. In compliance with the selection of arbitration method, SoC performance can be changed definitely. Fixed priority, round-robin, TDM arbitration are used in general arbitration method, In this study, we compose TLM algorithm and analyze general arbitration methods through TLM simulation. Consequently, we propose the hybrid bus arbitration policy and verify the performance, compared with the other arbitration methods.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.85-87
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• 2008

DMWs are common feature of the PWR in the welded connections between carbon steel and stainless steel piping. The nickel-based weld metal, Alloy 82/182, is used for welding the dissimilar metals and is known to be susceptible to PWSCC. A round-robin program has been implemented to benchmark the numerical simulation of the transient temperature and weld residual stresses in the DMWs. To solve the round-robin problem related to Pressurizer Safety & Relief nozzle, the thermal elasto-plastic analysis is performed in the DMW by using the FEM. The welding includes both the DMW of the nozzle to safe-end and the SMW of the safe-end and piping. Major results of the analyses are discussed: The axial and circumferential residual stresses are found to be -88MPa(225MPa) and -38MPa(293MPa) on the inner surface of the DMW; where the values in parenthesis are the residual stresses after the DMW. Thermo-mechanical interaction by the SMW has a significant effect on the residual stress fields in the DMW.

• The Journal of the Korea Contents Association
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• v.2 no.4
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• pp.85-92
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• 2002

This paper proposes the cell scheduling algorithm proper to high-speed ATM switch. The proposed algorithm is the VRR(Variable weight Round Robin) combined the FRR to variant QLT. The FRR performs the cell service of the fixed weight by each buffer. So, FRR don't support the QoS of ATM service classes although it is easy to implement a high speed switch. VRR uses the method expaned to variable weight according to buffer state as well as schedules the cell according the Fixed weight based FRR. The simulation to evaluate the proposed algorithm was done by AweSim arid Visual C++. The result graphs show that the proposed algorithm is excellent, especially in the aspect of cell loss. This area is engaged by English Abstract.

• Current Photovoltaic Research
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• v.8 no.2
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• pp.54-59
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• 2020

Within the IEA (International Energy Agency) PVPS (Photovoltaic Power System) Programme Task 15, 'Enabling Framework for the Acceleration of BIPV,' a round-robin action focusing on the performance of vertical BIPV elements as a facade in different climatic environments was performed. The performance of identical (both, in construction and bill of materials (BOM)) glass-to-glass c-Si BIPV elements was monitored at seven outdoor test sites in 6 different countries in Europe and Asia. In this work, the comprehensive results of the electrical and corresponding meteorological data will be presented and discussed. The monitored data were merged, processed, and filtered for further analysis. The analysis includes the chracteristics of the module temperatures and the in-plane irradiation at the outdoor test locations, mean daily PR per test module, time series of mean daily performance ratio coefficients, and monthly yield.