• Title/Summary/Keyword: room temperature deposition

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The Comparison to Physical Properties of Large Size Indium Zinc Oxide Transparent Conductive Layer (대면적 상온 Indium Zinc Oxide 투명 도전막의 물성 특성 비교)

  • Joung, Dae-Young;Lee, Young-Joon;Park, Joon-Yong;Yi, Jun-Sin
    • Journal of Surface Science and Engineering
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    • v.41 no.1
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    • pp.6-11
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    • 2008
  • An Indium Zinc Oxide(IZO) transparent conductive layer was deposited on a large size glass substrate by using magnetron dc sputtering method with varying a deposition temperature. As the deposition temperature decreased to a room temperature, the sheet resistance of IZO film increased. But this deposition temperature range is included in an applicable to a device. From a standpoint of the sheet resistance, the differences of the sheet resistance were not great and the uniformity of the layer was uniformed around 10%. Crystallization particles were shown on the surface of the layer as deposition temperature increased, but these particles were not shown on the surface of the layer as deposition temperature decreased to the room temperature. It didn't make a scrap of difference in a transmittance of varying deposition temperature. Therefore, it is concluded that IZO thin film manufactured by the room temperature deposition condition can be used as a large size transparent conductive layer of a liquid crystal display device.

Neutral Beam assisted Chemical Vapor Deposition at Low Temperature for n-type Doped nano-crystalline silicon Thin Film

  • Jang, Jin-Nyeong;Lee, Dong-Hyeok;So, Hyeon-Uk;Yu, Seok-Jae;Lee, Bong-Ju;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.52-52
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    • 2011
  • A novel deposition process for n-type nanocrystalline silicon (n-type nc-Si) thin films at room temperature has been developed by adopting the neutral beam assisted chemical vapor deposition (NBa-CVD). During formation of n-type nc-Si thin film by the NBa-CVD process with silicon reflector electrode at room temperature, the energetic particles could induce enhance doping efficiency and crystalline phase in polymorphous-Si thin films without additional heating on substrate; The dark conductivity and substrate temperature of P-doped polymorphous~nano crystalline silicon thin films increased with increasing the reflector bias. The NB energy heating substrate(but lower than $80^{\circ}C$ and increase doping efficiency. This low temperature processed doped nano-crystalline can address key problem in applications from flexible display backplane thin film transistor to flexible solar cell.

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Room Temperature Chemical Vapor Deposition for Fabrication of Titania Inverse Opals: Fabrication, Morphology Analysis and Optical Characterization

  • Moon, Jun-Hyuk;Cho, Young-Sang;Yang, Seung-Man
    • Bulletin of the Korean Chemical Society
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    • v.30 no.10
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    • pp.2245-2248
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    • 2009
  • This paper demonstrates room temperature chemical vapor deposition (RTCVD) for fabricating titania inverse opals. The colloidal crystals of monodisperse polymer latex spheres were used as a sacrificial template. Titania was deposited into the interstices between the colloidal spheres by altermate exposures to water and titanium tetrachloride (Ti$Cl_4$) vapors. The deposition was achieved under atmospheric pressure and at room temperature. Titania inverse opals were obtained by burning out the colloidal template at high temperatures. The filling fraction of titania was controlled by the number of deposition of Ti$Cl_4$ vapor. The morphology of inverse opals of titania were investigated. The optical reflection spectra revealed a photonic band gap and was used to estimate the refractive index of titania.

Various Dielectric Thick Films for Co-Integration of Passive and Active Devices by Aerosol Deposition Method (Aerosol Deposition Method에 의한 수동소자와 능동소자의 동시 직접화를 위한 다양한 유전체 후막)

  • Nam, Song-Min
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.348-348
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    • 2008
  • In recent, the concept of system-on-package (SOP) for highly integrated multifunctional systems has been paid attention to for the miniaturization and high frequency of electronic devices. In order to realize SOP, co-integration of passive devices, such as capacitors, resistors and inductors, and active devices should be achieved. If ceramic thick films can be grown at room temperature, we expect to be able to overcome many problems in conventional fabrication processes. So, we focused on the aerosol deposition method (ADM) as room temperature fabrication technology. ADM is a novel ceramic coating method based on the Room Temperature Impact Consolidation (RTIC) phenomena. This method has a wide range potential for fabrication of co-integration of passive and active devices. In this paper, I will present the future potential of ADM introducing various ceramic dielectric thick films for the integration of electronic ceramics.

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Room temperature-processed TiO2 coated photoelectrodes for dye-sensitized solar cells

  • Kim, Dae-gun;Lee, Kyung-min;Lee, Hyung-bok;Lim, Jong-woo;Park, Jae-hyuk
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.30 no.2
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    • pp.61-65
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    • 2020
  • The depletion of fossil fuels and the increase in environmental awareness have led to greater interest in renewable energy. In particular, solar cells have attracted attention because they can convert an infinite amount of solar energy into electricity. Dye-sensitize solar cells (DSSCs) are low cost third generation solar cells that can be manufactured using environmentally friendly materials. However, DSSC photoelectrodes are generally produced by screen printing, which requires high temperature heat treatment, and low temperature processes that can be used to produce flexible DSSCs are limited. To overcome these temperature limitations, this study fabricated photoelectrodes using room-temperature aerosol deposition. The resulting DSSCs had an energy conversion efficiency of 4.07 %. This shows that it is possible to produce DSSCs and flexible devices using room-temperature processes.

Study of Magnetic Field Shielded Sputtering Process as a Room Temperature High Quality ITO Thin Film Deposition Process

  • Lee, Jun-Young;Jang, Yun-Sung;Lee, You-Jong;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.288-289
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    • 2011
  • Indium Tin Oxide (ITO) is a typical highly Transparent Conductive Oxide (TCO) currently used as a transparent electrode material. Most widely used deposition method is the sputtering process for ITO film deposition because it has a high deposition rate, allows accurate control of the film thickness and easy deposition process and high electrical/optical properties. However, to apply high quality ITO thin film in a flexible microelectronic device using a plastic substrate, conventional DC magnetron sputtering (DMS) processed ITO thin film is not suitable because it needs a high temperature thermal annealing process to obtain high optical transmittance and low resistivity, while the generally plastic substrates has low glass transition temperatures. In the room temperature sputtering process, the electrical property degradation of ITO thin film is caused by negative oxygen ions effect. This high energy negative oxygen ions(about over 100eV) can be critical physical bombardment damages against the formation of the ITO thin film, and this damage does not recover in the room temperature process that does not offer thermal annealing. Hence new ITO deposition process that can provide the high electrical/optical properties of the ITO film at room temperature is needed. To solve these limitations we develop the Magnetic Field Shielded Sputtering (MFSS) system. The MFSS is based on DMS and it has the plasma limiter, which compose the permanent magnet array (Fig.1). During the ITO thin film deposition in the MFSS process, the electrons in the plasma are trapped by the magnetic field at the plasma limiters. The plasma limiter, which has a negative potential in the MFSS process, prevents to the damage by negative oxygen ions bombardment, and increases the heat(-) up effect by the Ar ions in the bulk plasma. Fig. 2. shows the electrical properties of the MFSS ITO thin film and DMS ITO thin film at room temperature. With the increase of the sputtering pressure, the resistivity of DMS ITO increases. On the other hand, the resistivity of the MFSS ITO slightly increases and becomes lower than that of the DMS ITO at all sputtering pressures. The lowest resistivity of the DMS ITO is $1.0{\times}10-3{\Omega}{\cdot}cm$ and that of the MFSS ITO is $4.5{\times}10-4{\Omega}{\cdot}cm$. This resistivity difference is caused by the carrier mobility. The carrier mobility of the MFSS ITO is 40 $cm^2/V{\cdot}s$, which is significantly higher than that of the DMS ITO (10 $cm^2/V{\cdot}s$). The low resistivity and high carrier mobility of the MFSS ITO are due to the magnetic field shielded effect. In addition, although not shown in this paper, the roughness of the MFSS ITO thin film is lower than that of the DMS ITO thin film, and TEM, XRD and XPS analysis of the MFSS ITO show the nano-crystalline structure. As a result, the MFSS process can effectively prevent to the high energy negative oxygen ions bombardment and supply activation energies by accelerating Ar ions in the plasma; therefore, high quality ITO can be deposited at room temperature.

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Effect of Deposition Temperature on the Electrical Performance of SiZnSnO Thin Film Transistors Fabricated by RF Magnetron Sputtering (스퍼터 공정을 이용한 SiZnSnO 산화물 반도체 박막 트랜지스터의 증착 온도에 따른 특성)

  • Ko, Kyung Min;Lee, Sang Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.5
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    • pp.282-285
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    • 2014
  • We have investigated the structural and electrical properties of Si-Zn-Sn-O (SZTO) thin films deposited by RF magnetron sputtering at various deposition temperatures from RT to $350^{\circ}C$. All the SZTO thin fims are amorphous structure. The mobility of SZTO thin film has been changed depending on the deposition temperature. SZTO thin film transistor shows mobility of 8.715 $cm^2/Vs$ at room temperature. We performed the electrical stress test by applying gate and drain voltage. SZTO thin film transistor shows good stability deposited at room temperature while showing poor stability deposited at $350^{\circ}C$. As a result, the electrical performance and stability have been changed depending on deposition temperature mainly because high deposition temperature loosened the amorphous structure generating more oxygen vacancies.

A Nano-particle Deposition System for Ceramic and Metal Coating at Room Temperature and Low Vacuum Conditions

  • Chun, Doo-Man;Kim, Min-Hyeng;Lee, Jae-Chul;Ahn, Sung-Hoon
    • International Journal of Precision Engineering and Manufacturing
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    • v.9 no.1
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    • pp.51-53
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    • 2008
  • A new nano-particle deposition system (NPDS) was developed for a ceramic and metal coating process. Nano- and micro-sized powders were sprayed through a supersonic nozzle at room temperature and low vacuum conditions to create ceramic and metal thin films on metal and polymer substrates without thermal damage. Ceramic titanium dioxide ($TiO_2$) powder was deposited on polyethylene terephthalate substrates and metal tin (Sn) powder was deposited on SUS substrates. Deposition images were obtained and the resulting chemical composition was measured using X-ray photoelectron spectroscopy. The test results demonstrated that the new NPDS provides a noble coating method for ceramic and metal materials.

Effect of Deposition Temperature on the Characteristics of Low Dielectric Fluorinated Amorphous Carbon Thin Films (증착온도가 저유전 a-C:F 박막의 특성에 미치는 영향)

  • Park, Jeong-Won;Yang, Sung-Hoon;Park, Jong-Wan
    • Korean Journal of Materials Research
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    • v.9 no.12
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    • pp.1211-1215
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    • 1999
  • Fluorinated amorphous carbon (a-C:F) films were prepared by an electron cyclotron resonance chemical vapor deposition (ECRCVD) system using a gas mixture of $C_2F_6$ and $CH_4$ over a range of deposition temperature (room temperature ~ 300$^{\circ}C$). 500$^{\AA}C$ thick DLC films were pre-deposited on Si substrate to improve the strength between substrate and a-C:F film. The chemical bonding structure, chemical composition, surface roughness and dielectric constant of a-C:F films deposited by varying the deposition temperature were studied with a variety of techniques, such as Fourier transform infrared spectroscopy(FTIR), X-ray photoelectron spectroscopy(XPS), atomic force microscopy (AFM) and capacitance-voltage(C-V) measurement. Both deposition rate and fluorine content decreased linearly with increasing deposition temperature. As the deposition temperature increased from room temperature to 300$^{\circ}C$, the fluorine concentration decreased from 53.9at.% down to 41.0at.%. The dielectric constant increased from 2.45 to 2.71 with increasing the deposition temperature from room temperature to 300$^{\circ}C$. The film shrinkage was reduced with increasing deposition temperature. This results ascribed by the increased crosslinking in the films at the higher deposition temperature.

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Low Temperature Chemical Vapor Deposition of BNO Thin Films for Flexible Electronic Device Applications (유연성 전자소자 적용을 위한 BNO박막의 저온화학기상증착)

  • Jeon, Sang-Yong;Seong, Nak-Jin;Yoon, Soon-Gil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.42-42
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    • 2007
  • In the future, electronic components will be integrated on flexible polymer substrates and then miniaturized by thin films using suitable thin film technologies. In this article, the concept of a room temperature CVD is demonstrated using $Bi_3NbO_7$ (BNO) films with a cubic fluorite structure and their structural and electrical properties were investigated in films deposited without substrate heating. Effects of substrate temperature on electrical properties of BNO films were also studied. Films deposited without substrate heating (real temperature of $50^{\circ}C$) show partially crystallized BNO single phases with grain size of approximately 6.5 nm. Their dielectric and leakage properties are comparable to those of films deposited by pulsed laser deposition at room temperature. The concept of room temperature CVD will become a new paradigm in the deposition of dielectric thin films for flexible electron device applications.

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