• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권12호
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• pp.609-615
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• 2005

A 30kW electrical power conversion system is developed for a variable speed wind turbine. In the wind energy conversion system(WECS) a synchronous generator with field current excitation converts the mechanical energy into electrical energy. As the voltage and the frequency of the generator output vary according to the wind speed, a 6-bridge diode rectifier and a PWM boost chopper is utilized as an ac-dc converter maintaining the constant dc-link voltage with only single switch control. An input current control algorithm for maximum power generation during the variable speed operation is proposed without any usage of speed sensor. Grid connection type PWM inverter converts dc input power to ac output currents into the grid. The active power to the grid is controlled by q-axis current and the reactive power is controlled by d-axis current with appropriate decoupling. The phase angle of utility voltage is detected using software PLL(Phased Locked Loop) in d-q synchronous reference frame. Experimental results from the test of 30kW prototype wind turbine system show that the generator power can be controlled effectively during the variable speed operation without any speed sensor.

• Journal of Power Electronics
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• 제5권2호
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• pp.109-119
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• 2005

This paper deals with the performance analysis of static compensator (STATCOM) based voltage regulator for self­excited induction generators (SEIGs) supplying balanced/unbalanced and linear/ non-linear loads. In practice, most of the loads are linear. But the presence of non-linear loads in some applications injects harmonics into the generating system. Because an SEIG is a weak isolated system, these harmonics have a great effect on its performance. Additionally, SEIG's offer poor voltage regulation and require an adjustable reactive power source to maintain a constant terminal voltage under a varying load. A three-phase insulated gate bipolar transistor (IGBT) based current controlled voltage source inverter (CC- VSI) known as STATCOM is used for harmonic elimination. It also provides the required reactive power an SEIG needs to maintain a constant terminal voltage under varying loads. A dynamic model of an SEIG-STATCOM system with the ability to simulate varying loads has been developed using a stationary d-q axes reference frame. This enables us to predict the behavior of the system under transient conditions. The simulated results show that by using a STATCOM based voltage regulator the SEIG terminal voltage can be maintained constant and free from harmonics under linear/non linear and balanced/unbalanced loads.

• 전기전자학회논문지
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• 제20권2호
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• pp.192-195
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• 2016

본 논문에서는 저항과 BJT를 사용하지 않고 sub-threshold 영역에서 동작하는 저전압, 저전력 기준전압 발생기를 설계하였다. CTAT 전압 발생기는 두 개의 NMOS 트랜지스터를 이용하여 구성하였고, 충분한 영역의 CTAT 전압을 발생시키기 위해 바디 바이어스 회로를 이용하였다. PTAT 전압 발생기는 PTAT 전압을 생성하기 위해 MOS 트랜지스터 입력 쌍의 서로 다른 사이즈 비를 이용하는 차동증폭기 형태로 구성하였다. 제안한 회로는 $0.18-{\mu}m$ 표준 CMOS 공정으로 설계되었다. 시뮬레이션 결과로 290mV의 출력 기준 전압을 가지며, -$20^{\circ}C$ 에서 $120^{\circ}C$의 온도 변화에서 92 ppm/$^{\circ}C$의 전압 변화 지수와 전원전압 0.63V에서 15.7nW의 소모 전력을 갖는 것을 확인하였다.

• 전자공학회논문지C
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• 제34C권12호
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• pp.37-42
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• 1997

A new temperature and supply-insensitive CMOS current reference circuit was designed and tested. Te temperature insensuitivity was achieved by eliminating the mobility dependence term through the multiplication of two current components, one which is proportional to mobility and the other which is inversely proportional to mobility, by using a newly designed CMOS square root circuit. The CMOS sqare root circuit was derived from its bipolar counterpart by operating the MOS transistors in the subthreshold region. The supply insensitivity was achieved by using an internal voltage generator. Te test chip was designed ans sent out for fabrication by using a 2.mu.m double-poly double-metal n-well CMOS technology. When an external voltage source was used for the square root circuit, the maximum variation and the average temperature sensitivity were measured to be 3% and 21.4ppm/.deg.C, respectively, for the temperature range of -15~130.deg.C. The maximum current variation with supply voltage was measured to be 3% within the commerical supply voltage range of 4.5~5.5V at 30.deg. C.

• 대한전자공학회논문지SD
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• 제38권4호
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• pp.251-265
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• 2001

반도체 소자가 소형화 되면서 소자의 신뢰성을 유지하고 전력 소모를 줄이기 위해 기가-비트 DRAM의 동작 전압은 1.5V 이하로 줄어들 것으로 기대된다. 따라서 기가-비트 DRAM을 구현하기 위해 저전압 회로 설계 기술이 요구된다. 이 연구에서는 지금까지 발표된 저전압 DRAM 회로 설계 기술에 대한 조사결과를 기술하였고, 기가-비트 DRAM을 위해 4가지 종류의 저전압 회로 설계 기술을 새로이 제안하였다. 이 4가지 저전압 회로 설계 기술은 subthreshold 누설 전류를 줄이는 계층적 negative-voltage word-line 구동기, two-phase VBB(Back-Bias Voltage) 발생기, two-phase VPP(Boosted Voltage) 발생기와 밴드갭 기준전압 발생기에 대한 것인데, 이에 대한 테스트 칩의 측정 결과와 SPICE 시뮬레이션 결과를 제시하였다.

• 대한전자공학회논문지SD
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• 제47권3호
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• pp.28-34
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• 2010

본 논문에서는 13.56 MHz 반송주파수를 사용하며, ISO1443 A타입/B타입, 15693을 만족하는 RFID 리더기용 송수신기를 설계하였다. 수신기에서 자동적으로 비교전압을 생성하기 위해서 양과 음의 두 피크전압을 검출할 수 있는 음의 피크검출기와 양의 피크검출기와 수신된 신호의 세기에 따라 기준전압의 결정 레벨(decision level)을 가변 할 수 있는 데이터 슬라이서를 사용한 회로를 제안하였다. 송신기는 15693 표준 스펙을 만족시키기 위해서는 큰 출력스왕 및 전류가 필요하게 된다. 이런 이유로 고정된 부하에서도 전원 전압이상의 출력스윙이 가능하고，큰 전류를 흐릴 수 있는 코일부하를 사용하면서 세 가지 표준 모두 만족시킬 수 있었다. 또한 각 표준에 따라 출력전류는 5 mA~240 mA, 변조율은 100%, 30%~5%까지 조정 가능하도록 하였다. 13.56 MHz RFID 리더기는 CM0S $0.18\;{\mu}m$ 공정과 3.3V 단독전압을 사용하였다. 패드 제외한 칩 면적은 $1.5\;mm\;{\times}\;1.5mm$ 이다.

• Journal of Electrical Engineering and Technology
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• 제13권3호
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• pp.1294-1303
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• 2018

This study optimises the no-load voltage waveform of tubular hydro-generators by a simple design scheme. For different centerlines of the pole shoe and damper bar, the optimisation effects on the no-load voltage waveform are investigated in two tubular hydro-generators with different weighted powers (34 MW and 18 MW). The results are compared with those of the traditional stator-slots skewed design. The quality of the no-load voltage waveform was related to the shifting degree, and the different optimisation effects between the integer slot generator (q = 2) and the fractional slot generator (q = 11/2) were analysed. This research can improve the quality of the power output and no-load voltage waveform, and provide an effective reference for improving the industrial design and manufacture level of tubular hydro-generators.

• 조명전기설비학회논문지
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• 제27권2호
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• pp.62-68
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• 2013

The dynamic voltage restorer (DVR) is an effective protection device for wind turbine generators based on doubly-fed induction generator (DFIG) that is operated under unbalanced voltage dip conditions. The compensating voltages of the DVR depend on the voltage dips and on the influence of the zero sequence component. The zero sequence component results in high insulation costs and asymmetry in terminal voltages. This paper proposes the use of a proportional-resonant controller in stationary reference frames for controlling zero sequence components in the DVR to protect the DFIG during unbalanced voltage dips. To enhance the proposed control method, a comparison is carried out between two cases: with and without using the control of a zero sequence component. Simulation results are presented to verify the effectiveness of the proposed control method by using the Psim simulation program.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2005년도 춘계학술대회
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• pp.51-54
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• 2005

Generator efficiency optimization is important for economic saving and environmental pollution reduction. In general, the machine loss can be reduced by the decreasing the flux level, resulting in the significant reduction of the core loss. This paper proposesan model-based controller is used to decrement the excitation current component on the basis of measured stator current and machine parameters and the q-axis current component controls the generator torque, by which the speed of the induction generator iscontrolled according to the variation of the wind speed in order to produce the maximum output power. The generator reference speed is adjusted according to the optimum tip-speed ratio. The generated power flows into the utility grid through the back-to-back PWM converter. The grid-side converter controls the dc link voltage and the line-side power factor by the q-axis and the d-axis current control, respectively. Experimental results are shown to verify the validity of the proposed scheme.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.225-227
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• 2008

This paper deals with the implementation on a Field Programmable Gate Array (FPGA) of PWM switching patterns for a voltage multilevel inverter. The reference data in main microcontroller is transmitted to the FPGA through 16 general purpose I/O ports. Herein, three-phase reference voltage signals are addressed by the last 2-bit (bit 15-14) and their data are assigned in remaining 14-bit, respectively. The carrier signals are created by 16-bit counter in up-down counting mode inside FPGA according to desirable topology. Each reference signal is compared with all carrier signals to generate corresponding PWM switching patterns for control of the multilevel inverter. Useful advantages of this scheme are easy implementation, simple software control and flexibility in adaptation to produce many PWM signals. Some simulations and experiments are carried out to validate the proposed method.