• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.11
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• pp.2116-2120
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• 2007

A realization for image distortion correction processing system with DSP processor is presented in this paper. The image distortion correcting algorithm is realized by DSP processor for focusing on more real time processing than image quality. The lens and camera distortion coefficients are processed by the Lookup Tables and the correcting algorithm is applied to reverse mapping method for geometrical transform. The system experimentation results in the processing time about 31.3 msec $720{\times}480$ wide range image, and the image is stable and spontaneous to be about 8.3% average PSNR variation with changing a wide angle.

• Journal of Korea Multimedia Society
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• v.20 no.4
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• pp.606-613
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• 2017

When the planar area is captured by the depth camera, the shape of the plane in the captured image has perspective projection distortion according to the position of the camera. We can correct the distorted image by the depth information in the plane in the captured area. Previous depth information based perspective distortion correction methods fail to satisfy the real-time property due to a large amount of computation. In this paper, we propose the method of applying the conversion table selectively by measuring the motion of the plane and performing the correction process by parallel processing for correcting perspective projection distortion. By appling the proposed method, the system for correcting perspective projection distortion correct the distorted image, whose resolution is 640x480, as 22.52ms per frame, so the proposed system satisfies the real-time property.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.122-128
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• 1994

Studies on treeing phenomena have depended on the visual measurement using optical microscope. In the visual measurement, it is difficult to analyze the treeing in real time because voltages are applied discontinuously and impossible to calculate the deterioated area by treeing. Only tree type and length are studied. In this paper, image processing is introduced and voltages are applied continuously. The tree length and area are calculated in real time from tree inception to breakdown. Growing characteristics about tree types are compared for the normalized breakdown time.

• Textile Coloration and Finishing
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• v.21 no.1
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• pp.53-58
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• 2009

A real-time inspection system has been developed by combining CCD based image processing algorithm and a standard lighting equipment. The system was tested for defective fabrics showing nozzle contact scratch marks, which were one of the frequently occurring defects. Multi-resolution analysis(MRA) algorithm were used and evaluated according to both their processing time and detection rate. Standard value for defective inspection was the mean of the non-defect image feature. Similarity was decided via comparing standard value with sample image feature value. Totally, we achieved defective inspection accuracy above 95%.

• IEMEK Journal of Embedded Systems and Applications
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• v.10 no.6
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• pp.363-372
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• 2015

Recent some SoC FPGA Releases that integrate ARM processor and FPGA fabric show better performance compared to the ASIC SoC used in typical embedded image processing system. In this study, using the above advantages, we implement a SoC FPGA-based Real-Time Object Recognition and Tracking System. In our system, the video input and output, image preprocessing process, and background subtraction processing were implemented in FPGA logics. And the object recognition and tracking processes were implemented in ARM processor-based programs. Our system provides the processing performance of 5.3 fps for the SVGA video input. This is about 79 times faster processing power than software approach based on the Nios II Soft-core processor, and about 4 times faster than approach based the HPS processor. Consequently, if the object recognition and tracking system takes a design structure combined with the FPGA logic and HPS processor-based processes of recent SoC FPGA Releases, then the real-time processing is possible because the processing speed is improved than the system that be handled only by the software approach.

• Journal of the Korea Society of Computer and Information
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• v.21 no.11
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• pp.31-38
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• 2016

In this paper, we propose multi-scale infrared target detection algorithm with varied filter size using integral image. Filter based target detection is widely used for small target detection, but it doesn't suit for large target detection depending on the filter size. When there are multi-scale targets on the sky background, detection filter with small filter size can not detect the whole shape of the large targe. In contrast, detection filter with large filter size doesn't suit for small target detection, but also it requires a large amount of processing time. The proposed algorithm integrates the filtering results of varied filter size for the detection of small and large targets. The proposed algorithm has good performance for both small and large target detection. Furthermore, the proposed algorithm requires a less processing time, since it use the integral image to make the mean images with different filter sizes for subtraction between the original image and the respective mean image. In addition, we propose the implementation of real-time embedded system using FPGA.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.6
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• pp.335-344
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• 2014

As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.

• Journal of information and communication convergence engineering
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• v.11 no.4
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• pp.298-306
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• 2013

The scale invariant feature transform (SIFT) is an effective algorithm used in object recognition, panorama stitching, and image matching. However, due to its complexity, real-time processing is difficult to achieve with current software approaches. The increasing availability of parallel computers makes parallelizing these tasks an attractive approach. This paper proposes a novel parallel approach for SIFT algorithm implementation using a block filtering technique in a Gaussian convolution process on the SIMD Pixel Processor. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and input/output capabilities of the processor, which results in a system that can perform real-time image and video compression. We apply this implementation to images and measure the effectiveness of such an approach. Experimental simulation results indicate that the proposed method is capable of real-time applications, and the result of our parallel approach is outstanding in terms of the processing performance.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.4
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• pp.43-49
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• 2021

A small infrared image homing system is a tracking system that has an infrared image sensor that identifies a target through the day and night infrared image processing of the target on the ground and searches for and detects the target with respect to the main target. This paper describes the development of a board equipped with a high-speed CPU and FPGA (Field Programmable Gate Array) to identify target through real-time image processing by acquiring target information through infrared image. We propose a CPU-FPGA combining architecture for CPU and FPGA selection and video signal processing, and also describe a controller design using FPGA to control infrared sensor.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.52 no.11
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• pp.634-643
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• 2003

This paper presents a method for detecting skin tumors on chicken carcasses using hyperspectral images. It utilizes both fluorescence and reflectance image information in hyperspectral images. A detection system that is built on this concept can increase detection rate and reduce processing time, because the procedure for detection can be simplified. Chicken carcasses are examined first using band ratio FCM information of fluorescence image and it results in candidate regions for skin tumor. Next classifier selects the real tumor spots using PCA components information of reflectance image from the candidate regions. For the real world application, real-time processing is a key issue in implementation and the proposed method can accommodate the requirement by using a limited number of features to maintain the low computational complexity. Nevertheless, it shows favorable results and, in addition, uncovers meaningful spectral bands for detecting tumors using hyperspectral image. The method and findings can be employed in implementing customized chicken tumor detection systems.