• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.11
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• pp.36-43
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• 2015

A pixel-level readout circuit is studied for 2-dimensional microbolometer focal plane arrays (FPAs). A current mirroring injection (CMI) input circuit with 2-step current-mode bias suppression is proposed for a pixel-level architecture with high responsivity and long integration time. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a $320{\times}240$ microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed 2-step bias-current suppression has sufficiently low calibration error with wide calibration range, and the calibration range and error can be easily optimized by controlling some design parameters. Due to high responsivity and a long integration time of more than 1 ms, the noise equivalent temperature difference (NETD) of the proposed circuit can be improved to 26 mK, which is much better than that of the conventional circuits, 67 mK.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.503-510
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• 2006

Readout circuit is to convert signal occurred in a defector into suitable signal for image signal processing. In general, it has to possess functions of impedance matching with perception element, amplification, noise reduction and cell selection. It also should satisfies conditions of low-power, low-noise, linearity, uniformity, dynamic range, excellent frequency-response characteristic, and so on. The technical issues in developing image processing equipment for focal plane way (FPA) can be categorized as follow: First, ultraviolet (UV) my detector material and fine processing technology. Second, ReadOut IC (ROIC) design technology to process electric signal from detector. Last, package technology for hybrid bonding between detector and ROIC. ROIC enables intelligence and multi-function of image equipment. It is a core component for high value added commercialization ultimately. Especially, in development of high-resolution image equipment ROIC, it is necessary that high-integrated and low-power circuit design technology satisfied with design specifications such as detector characteristic, signal dynamic range, readout rate, noise characteristic, ceil pitch, power consumption and so on. In this paper, we implemented a $8\times8$ FPA prototype ROIC for reduction of period and cost. We tested unit block and overall functions of designed $8\times8$ FPA ROIC. Also, we manufactured ROIC control and image boards, and then were able to verify operation of ROIC by confirming detected image from PC's monitor through UART(Universal Asynchronous Receiver Transmitter) communication.

• ETRI Journal
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• v.30 no.5
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• pp.644-652
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• 2008

In this paper, a low-power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35-${\mu}m$ CMOS logic technology. To achieve low-power performance, the low-voltage capacitance-to-pulse-width converter based on a self-reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self-reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra-low power dissipation of 157 ${\mu}W$ of the interface-circuit core. These results demonstrate that the new interface circuit with self-reset operation successfully reduces power consumption. In addition, a prototype wireless sensor-module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low-power performance is essential.

• Journal of Sensor Science and Technology
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• v.5 no.5
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• pp.63-68
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• 1996

In order to implement the integrated capacitive pressure sensors, which contains integrated interface circuits to detect the electrical output signal, several main factors that have a bad effect on the characteristics of sensors must be improved, such as parasitic capacitance effects, temperature/thermal drift, and the leakage current of a readout circuitry. This paper describes the novel design of the dedicated CMOS readout circuitry that is consists of two capacitance to frequency converters and 4 bit digital logic compensating circuits. Dividing the oscillation frequency of a sensing sensor by that of reference sensor, this circuit is designed to eliminate the thermal/temperature drift and the effect of the leakage currents, and to access a digital signals to obtain a high signal-to-noise(S/N)ratio. Therefore, the resolution of this circuit can be increased by increasing the number of the digital bits. Digital compensated circuits of this circuits, except for the C-F converters, are fabricated on a FPGA chip, and fundamental performance of the circuits are evaluated.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.341-342
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• 2007

The IRFPA (InfraRed Focal Plane Array) ROIC (ReadOut Integrated Circuit) was designed in folded-cascode Op-Amp using $0.35{\mu}m$ CMOS technology. As the folded-cascode has high open-loop voltage gain and fast settling time, that used in many analog circuit designs. In this paper, folded-cascode Op-Amp for ROIC of the $32{\times}32$ IRFPA has been designed. HSPICE simulation results are unit gain bandwidth of 13.0MHz, 90.6 dB open loop gain, 8 V/${\mu}m$ slew rate, 600 ns settling time and $66^{\circ}$ phase margin.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.5
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• pp.350-354
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• 2020

In this study, a pressure sensor for each displacement was fabricated based on the silicon-based pressure sensor obtained through simulation results. Wires were bonded to the pressure sensor, and a piezoresistive pressure sensor was inserted into the printed circuit board (PCB) base by directly connecting a micro-electro-mechanical system (MEMS) sensor and a readout integrated circuit (ROIC) for signal processing. In addition, to prevent exposure, a non-conductive liquid silicone was injected into the sensor and the entire ROIC using a pipette. The packaging proceeded to block from the outside. Performing such packaging, comparing simple contact with strong contact, and confirming that the measured pulse wavelength appears accurately.

• Nuclear Engineering and Technology
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• v.54 no.3
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• pp.1030-1036
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• 2022

A high detection efficiency thermal neutron detector based on the ⁶LiF/ZnS(Ag) scintillation screens, wavelength-shifting fibers (WLSF) and Silicon photomultiplier (SiPM) readout is under development at China Spallation Neutron Source (CSNS) for the Engineering Material Diffractometer (EMD).A prototype with a sensitive volume of 180mm×192mm has been built. Signals from SiPMs are processed by the self-design Application Specific Integrated Circuit (ASIC). The performances of this detector prototype are as follows: neutron detection efficiency could reach 50.5% at 1 Å, position resolution of 3, the dark count rate <0.1Hz, the maximum count rate >200KHz. Such detector prototype could be an elementary unit for applications in the EMD detector arrays.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.27-37
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• 1999

A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.4
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• pp.251-257
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• 2015

This work presents modelling and simulation of a readout integrated circuit (ROIC) design considering pair-wise serial configuration along with thermal modeling of an uncooled microbolometer array. A fully differential approach is used at the input stage in order to reduce fixed pattern noise due to the process variation and self-heating-related issues. Each pair of microbolometers is pulse-biased such that they both fall under the same self-heating point along the self-heating trend line. A ${\pm}10%$ process variation is considered. The proposed design is simulated with a reference input image consisting of an array of $127{\times}92$ pixels. This configuration uses only one unity gain differential amplifier along with a single 14-bit analog-to-digital converter in order to minimize the dynamic range requirement of the ROIC.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.11
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• pp.7-13
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• 2002

BSCT 320${\times}$240 IRFPA detector module is implemented, which is a key component in uncooled thermal imaging systems. The detector module consists of two parts, infrared sensitive pixel array and read-out integrated circuit(ROIC). The BSCT 320${\times}$240 pixels are made by laser scribe process and 10-${\mu}m$ micro-bump to satisfy 50-${\mu}m$ pitch and 95-% fill-factor. The ROIC has been designed to electrically address the pixels sequentailly and to improve signal-to-noise ratio with single transistor amplifier, HPF, tunable LPF and clamp circuit. The fabricated hybrid chip of detector and ROIC has been mounted on the TEC built-in ceramic package for more stable operation and tested for lots of electrical and optical properties. The IRFA sample has shown successful properties and met with good results of fill-factor, detectivity and responsivity.