• 한국재료학회지
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• 제12권6호
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• pp.508-512
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• 2002

$2000{\AA}-SiO_2/Si(100)$ and $560{\AA}-Si_3N_4/Si(100)$ wafers, which are 10 cm in diameter, were directly bonded using a rapid thermal annealing method. We fixed the anneal time of 30 second and varied the anneal temperatures from 600 to $1200^{\circ}C$. The bond strength of bonded wafer pairs at given anneal temperature were evaluated by a razor blade crack opening method and a four-point bonding method, respectively. The results clearly slow that the four-point bending method is more suitable for evaluating the small bond strength of 80~430 mJ/$\m^2$ compared to the razor blade crack opening method, which shows no anneal temperature dependence in small bond strength.

• 한국표면공학회지
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• 제33권2호
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• 한국재료학회지
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• 제12권10호
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• pp.820-824
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• 2002

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

• 한국표면공학회지
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• 제34권1호
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• pp.33-38
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• 2001

10cm-diameter Si(100)∥$1.3\mu\textrm{m}$-X$1.3_2$X$1.3\mu\textrm{m}$-$SiO_2$∥Si(100) afers were prepared using a fast linear annealing (FLA) equipment. 1.3$\mu\textrm{m}$-thick $SiO_2$ films were grown by dry oxidation process. After cleaning and premating the wafers in a class 100 clean room, they were heat treated using with the FLA and conventional electric furnace. Bonded area and bond strength of wafer pairs were measured using a infrared (IR) camera and razor blade crack opening method, respectively. It was confinmed that the bonded area by FLA was around 99% and the bond strength value reached 2172mJ/$\m^2$, which is equivalent to theoritical bond strength. Our result implies that thick $SiO_2$ SOI may be prepared more easily by using $SiO_2$$SiO_2$ bonding interfaces then those of Si/$SiO_2$'s.

• 한국재료학회지
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• 제12권2호
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• pp.117-120
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• 2002

We investigated the possibility of direct bonding of the Si ∥SiO$_2$/Si$_3$N$_4$∥Si wafers for Oxide-Nitride-Oxide(ONO) gate oxide applications. 10cm-diameter 2000$\AA$-thick thermal oxide/Si(100) and 500$\AA$-Si$_3$N$_4$LPCVD/Si (100) wafers were prepared, and wet cleaned to activate the surface as hydrophilic and hydrophobic states, respectively. Cleaned wafers were premated wish facing the mirror planes by a specially designed aligner in class-100 clean room immediately. Premated wafer pairs were annealed by an electric furnace at the temperatures of 400, 600, 800, 1000, and 120$0^{\circ}C$ for 2hours, respectively. Direct bonded wafer pairs were characterized the bond area with a infrared(IR) analyzer, and measured the bonding interface energy by a razor blade crack opening method. We confirmed that the bond interface energy became 2,344mJ/$\m^2$ when annealing temperature reached 100$0^{\circ}C$, which were comparable with the interface energy of homeogenous wafer pairs of Si/Si.

• 한국재료학회지
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• 제11권5호
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• pp.427-430
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• 2001

절연 특성이 기존의 SiO$_2$ 보다 우수한 500 두께의 SiN$_4$층을 두 단결정 실리콘사이의 절연막질로 채택하고 직접접합시켜 직경 10cm의 Si(100) /500 -Si$_3$N$_4$/Si (100) 기판쌍을 제조하였다. p-type (100) 실리콘기판을 친수성, 소수성을 갖도록 습식방법으로 세척한 두 그룹의 시편들을 준비하였다. 기판전면에 LPCVD로 500 $\AA$ 두께의 Si$_3$N$_4$∥Si(100) 기판을 성장시키고 실리론 기판과 고청정상태에서 가접시킨 후, 선형열원의 이동속도를 0.1mm/s로 고정시키고 선형 입열량을 400~1125w 범위에서 변화시키면서 직접접합을 실시하였다. 접합된 기판은 적외선 카메라로 계면 접합면적을 확인하고 razor blade creek opening 측정법으로 세정 방법에 따른 각 기판쌍 그들의 접합강도를 확인하였다. 접합강도가 측정된 기판쌍은 high resolution transmission electron microscopy (HRTEM )을 사용하여 수직단면 미세구조를 조사하였다. 입열량의 증가에 따라 두 그를 모두 접합율은 큰 유의차 없이 765% 정도로, 소수성 처리가 된 기판쌍의 접합강도는 1577mJ/$m^2$가지 선형적으로 증가하였으나, 친수성 처리가 된 기판쌍은 주어진 실험 범위에서 입열량의 증가에 따라 큰 변화 없이 2000mj/$m^2$이상의 접합 강도를 보였다 친수성 처리가 된 기판쌍의 수직단면 미세구조를 고분해능 투과전자현미경으로 각인한 결과 모든 시편의 실리콘과 Si$_3$N$_4$사이에 25 $\AA$ 정도의 SiO$_2$ 자연산화막이 존재하여 중간충 역할을 함으로서 기판접합강도를 향상시키는 것으로 판단되었다.