• 제목/요약/키워드: radio frequency (RF) transceiver

검색결과 44건 처리시간 0.027초

임펄스 UWB 시스템을 위한 RF 송수신기 설계 (RF Transceiver Design for Impulse Radio UWB System)

  • 박주호;오미경;오정열;길민수;김재영
    • 대한임베디드공학회논문지
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    • 제4권1호
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    • pp.29-34
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    • 2009
  • In this paper, we design RF transceiver architecture and building blocks for impulse radio UWB system. Impulse radio UWB signal occupies the wide frequency band which is very low transmission power. So, it can minimize the interference effect with the other system. Using UWB technology, we obtain position awareness service. Therefore, we describe the RF transceiver architecture of direct conversion receiver and define the requirement of RF transceiver. Moreover, we implement a prototype RF transceiver based on the presented standard and verify a function and performance through the wireless data communication and ranging test.

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Implementation of Filter Bank-Based RF Transceiver for TV White Space

  • Kang, Kyu-Min;Park, Jae Cheol;Park, Seungkeun
    • ETRI Journal
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    • 제37권6호
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    • pp.1077-1086
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    • 2015
  • This paper presents a general-purpose design scheme of a filter bank (FB)-based radio frequency (RF) transceiver that operates across the entire ultra-high frequency (UHF) TV band from 470 MHz to 698 MHz and complies with the TV white space (TVWS) regulatory requirements. To this end, an intermediate frequency (IF) band-pass filter (BPF) with a sharp skirt characteristic is considered as a solution for handling the incoming signals from a baseband modem. Specifically, an FB-based BPF structure with four ceramic resonator filters that effectively rejects unwanted signals is proposed to extract a desired signal in the TV band. Achievable data rates of a cognitive radio system (CRS) employing the proposed FB-based RF transceiver at the application layer are investigated in both wired and wireless environments. The service coverage of the CRS network is measured according to several modulation and coding schemes (MCSs) of the CRS. The results show that the coverage of a wireless network in a nearly open area can be extended by more than 9.3 km in the TVWS. Experimental results also confirm that the proposed FB-based RF transceiver is adequate for utilization in TVWS applications.

WSN 을 위한 초저전력 MICS RF 송수신기 기술 개요 및 설계 기법 (Ultra-Low Power MICS RF Transceiver Design for Wireless Sensor Network)

  • 김규원;김유정;한정환
    • 반도체공학회 논문지
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    • 제2권1호
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    • pp.9-16
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    • 2024
  • 본 논문에서는 무선 센서 네트워크를 위한 생체이식형 초저전력 MICS RF 트랜시버 설게에 대해 다룬다. 400 MHz MICS 표준은 WBAN 무선 센서 시스템 구현을 위해, 인체 내 전파적 특성 및 주변 네트워크와의 간접 최소화하며 고려되었다. 본 논문은 MICS 표준에 부합하는 시스템 및 송수신기 설계를 위한 link budget 및 다양한 송수신 아키텍쳐, 초저전력 송수신기 회로기법을 포함한다.

224MHz RF 송수신 회로의 적층형 PAA 패키지 (A Stacked Pad Area Array Package for 224MHz RF Transceiver Modules)

  • 남상우;홍석용;지용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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    • pp.187-190
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    • 2000
  • We presents the construction of radio frequency pad area array package modules which operate at radio frequency of 224MHz, and proposes the structure of RF module packages to improve its electrical characteristics. The module of RF PAA package was constructed in the configuration of three dimensional stacked package and reduced size. RF PAA packages showed the optimized and improved gain of 2dB by partitioning the RF transceiver with 3 dimensional stacked PAA packages.

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470-MHz-698-MHz IEEE 802.15.4m Compliant RF CMOS Transceiver

  • Seo, Youngho;Lee, Seungsik;Kim, Changwan
    • ETRI Journal
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    • 제40권2호
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    • pp.167-179
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    • 2018
  • This paper proposes an IEEE 802.15.4m compliant TV white-space orthogonal frequency-division multiplexing (TVWS)-(OFDM) radio frequency (RF) transceiver that can be adopted in advanced metering infrastructures, universal remote controllers, smart factories, consumer electronics, and other areas. The proposed TVWS-OFDM RF transceiver consists of a receiver, a transmitter, a 25% duty-cycle local oscillator generator, and a delta-sigma fractional-N phase-locked loop. In the TV band from 470 MHz to 698 MHz, the highly linear RF transmitter protects the occupied TV signals, and the high-Q filtering RF receiver is tolerable to in-band interferers as strong as -20 dBm at a 3-MHz offset. The proposed TVWS-OFDM RF transceiver is fabricated using a $0.13-{\mu}m$ CMOS process, and consumes 47 mA in the Tx mode and 35 mA in the Rx mode. The fabricated chip shows a Tx average power of 0 dBm with an error-vector-magnitude of < 3%, and a sensitivity level of -103 dBm with a packet-error-rate of < 3%. Using the implemented TVWS-OFDM modules, a public demonstration of electricity metering was successfully carried out.

Review on Performance Requirements, Design and Implementation of RF Transceiver for Mobile Communications

  • 이일규;류성렬;오승엽;홍헌진
    • 정보와 통신
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    • 제24권3호
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    • pp.76-86
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    • 2007
  • This paper describes the RF performance issues of UE RF Transceiver for W-CDMA system based on 3GPP specifications. the parameters of transmitter and receiver are derived from the viewpoint of RF performance. In order for UE to achieve high performance, the transceiver performance requirements such as ACIR, EVM, Peak Code Domain Error, spectrum emission mask, frequency error stability and TX power control dynamic range for transmitter and reference sensitivity level, blocking characteristics, noise figure, ACS, linearity, AGC dynamic range for receiver are considered. On the basis of the required parameters, the UE RF transceiver is designed and then implemented. The evaluation of RF performance is accomplished through practical test scenarios.

3G W-CDMA UE 요구사항 평가를 위한 RF 트랜시버 구현 (RF Transceiver Implementation to Evaluate the Requirements of 3G W-CDMA User Equipment)

  • Il-Kyoo Lee;Seung-Hyeub Oh
    • 한국전자파학회논문지
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    • 제14권2호
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    • pp.148-156
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    • 2003
  • 본 논문은 3 GPP 규격을 바탕으로 한 W-CDMA UE 시스템의 RF 성능관련 내용을 다루고 있으며 송수신 파라미터를 RF 성능관점에서 유출하였다. 최적의 UE성능을 얻기 위해 송신기에 대해서는 ACLR, EVM, 피크코드영역 에러, 스펙트럼 방사 마스크, 주파수 오차 안정도, 송신전력제어 범위와 같은 성능 요구사항을 고찰하였고 수신기에 대해서는 수신 감도, 블록킹 특성, 잡음지수, 인접채널 선택도, 수신 ACC 범위 등이 고려되었다. 요구된 파라미터들을 근거로 UE RF 트랜시버를 구현하였고 실제 측정 시나리오에 따라서 RF 성능평가를 수행하였다.

An Architecture of Reconfigurable Transceiver for OFDM/TDD based Portable Internet Service System

  • Jung Jae Ho;Kim Jun Hyung;Kim Sung Min;Choi Hyun Chul;Lee Kwang Chun
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 학술대회지
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    • pp.667-670
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    • 2004
  • In this paper, we have presented the improved IF transceiver architecture and the implementation and experimental results on re-configurable transceiver based on digital IF for multiple wideband OFDM/TDD base stations for high-speed portable internet-service in which is issued Korea. The implemented IF transceiver has been designed to support multiple frequency allocations and multiple standards by only modifying the programmable software not its hardware like as the software-defined-radio concept. Also, the digital complex quadrature modulation technique has been used for the digital IF transmitter, which is able to combine multiple frequency bands in digital processing block not RF block and to reject the image frequency signals. And the bandpass sampling technique has been used for the digital IF receiver to reduce the sampling rate of ADC. This paper has shown the experiment results on the frequency response and constellation on the base-station implemented using the modified IEEE 802.16a/e physical layer channel structure based on OFDM/TDD.

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A New Automatic Compensation Network for System-on-Chip Transceivers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • 제29권3호
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    • pp.371-380
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    • 2007
  • This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.

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A Dual-Mode 2.4-GHz CMOS Transceiver for High-Rate Bluetooth Systems

  • Hyun, Seok-Bong;Tak, Geum-Young;Kim, Sun-Hee;Kim, Byung-Jo;Ko, Jin-Ho;Park, Seong-Su
    • ETRI Journal
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    • 제26권3호
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    • pp.229-240
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    • 2004
  • This paper reports on our development of a dual-mode transceiver for a CMOS high-rate Bluetooth system-onchip solution. The transceiver includes most of the radio building blocks such as an active complex filter, a Gaussian frequency shift keying (GFSK) demodulator, a variable gain amplifier (VGA), a dc offset cancellation circuit, a quadrature local oscillator (LO) generator, and an RF front-end. It is designed for both the normal-rate Bluetooth with an instantaneous bit rate of 1 Mb/s and the high-rate Bluetooth of up to 12 Mb/s. The receiver employs a dualconversion combined with a baseband dual-path architecture for resolving many problems such as flicker noise, dc offset, and power consumption of the dual-mode system. The transceiver requires none of the external image-rejection and intermediate frequency (IF) channel filters by using an LO of 1.6 GHz and the fifth order onchip filters. The chip is fabricated on a $6.5-mm^{2}$ die using a standard $0.25-{\mu}m$ CMOS technology. Experimental results show an in-band image-rejection ratio of 40 dB, an IIP3 of -5 dBm, and a sensitivity of -77 dBm for the Bluetooth mode when the losses from the external components are compensated. It consumes 42 mA in receive ${\pi}/4-diffrential$ quadrature phase-shift keying $({\pi}/4-DQPSK)$ mode of 8 Mb/s, 35 mA in receive GFSK mode of 1 Mb/s, and 32 mA in transmit mode from a 2.5-V supply. These results indicate that the architecture and circuits are adaptable to the implementation of a low-cost, multi-mode, high-speed wireless personal area network.

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