• Title/Summary/Keyword: pulse load

Search Result 530, Processing Time 0.025 seconds

Harmonic Reduction Scheme By the Advanced Auxiliary Voltage Supply (개선된 보조전원장치에 의한 고조파 저감대책)

  • Yoon, Doo-O;Yoon, Kyoung-Kuk;Kim, Sung-Hwan
    • Journal of the Korean Society of Marine Environment & Safety
    • /
    • v.21 no.6
    • /
    • pp.759-769
    • /
    • 2015
  • Diode rectifiers are very popular in industry. However, they include large low-order harmonics in the input current and do not satisfy harmonic current content restrictions. To reduce the harmonics to the power system, several methods have been introduced. It is heavy and expensive solution to use passive filters as the solution for high power application. Another solution for the harmonic filter is utilization of active filter, but it is too expensive solution. Diode rectifiers with configurations using switching device have been introduced, but they are very complicated. The combined 12-pulse diode rectifier with the square auxiliary voltage supply has been introduced. It has the advantages that auxiliary circuit is simple and inexpensive compared to other strategies. The advanced auxiliary voltage supply in this thesis is presented as a new solution. When the square auxiliary voltage supply applied, the improvement of THD is 6~60[%] in whole load range. But when the advanced auxiliary voltage supply applied, it shows stable and excellent reduction effect of THD as 57~71[%]. Especially, for the case with 10[%] load factor, reduction effect of THD has little effect as 6[%] in the case of inserting a square auxiliary voltage supply. But when the proposed new solution applied, reduction effect has excellent effect as 71[%]. Theoretical analysis of the combined 12-pulse diode rectifier with the advanced auxiliary voltage supply is presented and control methods of the auxiliary supply is proposed. The reduction in the input current harmonics is verified by simulation using software PSIM.

Design of a Tripple-Mode DC-DC Buck Converter (3중 모드 DC-DC 벅 변환기 설계)

  • Yu, Seong-Mok;Park, Joon-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
    • /
    • v.15 no.2
    • /
    • pp.134-142
    • /
    • 2011
  • This paper describes a tripple-mode high-efficiency DC-DC buck converter. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(100mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~100mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 96.4% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is 1.15mm ${\times}$ 1.10mm including pads.

A Design for Solid-State Radar SSPA with Sequential Bias Circuits (순차바이어스를 이용한 반도체 레이더용 SSPA 설계)

  • Koo, Ryung-Seo
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.11
    • /
    • pp.2479-2485
    • /
    • 2013
  • In this paper, we present a design for solid-state radar SSPA with sequential bias. We apply to variable extension pulse generator to eliminate signal distortion which is caused by bias rising/falling delay of power amplifier. There is an optimum impedance matching circuit to have high efficiency of GaN-power device by measuring microwave characteristics through load-pull method. The designed SSPA is consisted of pre-amplifier, drive-amplifier and main-amplifier as a three stages to apply for X-Band solid-state radar. Thereby we made a 200W SSPA which has output pulse maximum power shows 53.67dBm and its average power is 52.85dBm. The optimum design of transceiver module for solid-state pulse compression radar which is presented in this dissertation, it can be available to miniaturize and to improve the radar performances through additional research for digital radar from now on.

Analysis of Harmonic Effects on Substation Power System and its Countermeasure (지하철 전력계통의 고조파 영향 분석 및 그 대책에 관한 연구)

  • Song, Jin-Ho;Hwang, Yu-Mo
    • The Transactions of the Korean Institute of Electrical Engineers B
    • /
    • v.51 no.4
    • /
    • pp.210-220
    • /
    • 2002
  • We analysised the effect of harmonics on electric machines of substation power system barred on quantitatively measured harmonics and proposed the methods for prevention of harmonics through checking on transformer, rectifier and cable's capacities against harmonics with reference to KEPCO's electricity service standard. In order to analysis harmoninics of silicon rectifier that is power source in DC substation, computer simulations for a substation with TR of high voltage distribution switchboard are performed. Simulation results show that the total harmonic distortion factor becomes smaller for TR primary and receiving points in order rather than silicon rectifier which is harmonic generation source so that the harmonics generated frets each rectifier are outflowed to power supply and high voltage distribution switchboard The result of higher distortion factors of voltage and current for rectifier with 100% load than those with 50 % and 30% indicates that the waveform of voltage and current for the real substation power system at the office-going and the closing hours with heavy loads might be more distorted. As proposed methods for harmonic reduction, the conventional 6 pulse-type for substation is required to be replaced by 12 pulse-type for reduction of 5th and 7th harmonics. The active filter rather than the passive filter is more effective due to severe variance of rectifier loads, but the high cost is price to be paid. In view of installation area and costs, the use of 12 pulse-type transformer is desirable and then the parallel transformer and the rectifier within the substation must be replaced at the same time. Other substations with parallel feeder can use 6 pulse-type transformer.

A New DC Ripple-Voltage Suppression Scheme in Three Phase Buck Diode Rectifiers with Unity Power Factor (단위 역률을 갖는 3상 BUCK 다이오드 정류기에서의 새로운 DC 리플-전압 저감 기법)

  • Lee, Dong-Yun;Choy, Ick;Song, Joong-Ho;Choi, Ju-Yeop;Kim, Kwang-Bae;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.5 no.2
    • /
    • pp.154-162
    • /
    • 2000
  • A technique to suppress the low frequency ripple voltage of the DC output ${\gamma}$oltage in three-phase buck d diode rectifiers is presented in this paper. The proposed pulse frequency modulation method is employed to r regulate the output voltage of the buck diode rectifiers and guarantee zero-current switching of the switch over the Vvide load range. The pulse frequency control method used in tIns paper shows generally good p performance such as low THD of the input line current and unity power factor. In addition, the pulse f freιluency method can be effectively used to suppress the low frequency voltage ripple appeared in the dc output voltage. The proposed technique illustrates its validity and effectiveness through the respective s simulations and experiments.

  • PDF

A Triple-Mode DC-DC Buck Converter with DPSS Function (DPSS 기능을 갖는 3중 모드 DC-DC Buck 변환기)

  • Yu, Seong-Mok;Hang, In-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2011.10a
    • /
    • pp.411-414
    • /
    • 2011
  • This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

  • PDF

A Flyback Transformer linked Soft Switching PWM DC-DC Power Converter using Trapped Energy Recovery Passive Quasi-Resonant Snubbers with an Auxiliary Three-Winding Transformer

  • Ahmed Tarek;Chandhaket Srawouth;Nakaoka Mutsuo;Jung Song Hwa;Lee Hyun-Woo
    • Journal of Power Electronics
    • /
    • v.4 no.4
    • /
    • pp.237-245
    • /
    • 2004
  • In this paper, a two-switch high frequency flyback transformer linked zero voltage soft switching PWM DC-DC power converter implemented for distributed DC- feeding power conditioning supplies is proposed and discussed. This switch mode power converter circuit is mainly based on two main active power semiconductor switches and a main flyback high frequency transformer linked DC-DC converter in which, two passive lossless quasi-resonant snubbers with pulse current regeneration loops for energy recovery to the DC supply voltages composed of a three winding auxiliary high frequency pulse transformer, auxiliary capacitors and auxiliary diodes for inductive energy recovery discharge blocking due to snubber capacitors are introduced to achieve zero voltage soft switching from light to full load conditions. It is clarified that the passive resonant snubber-assisted soft switching PWM DC-DC power converter has some advantages such as simple circuit configuration, low cost, simple control scheme, high efficiency and lowered noises due to the soft switching commutation. Its operating principle is also described using each mode equivalent circuit. To determine the optimum resonant snubber circuit parameters, some practical design considerations are discussed and evaluated in this paper. Moreover, through experimentation the practical effectiveness of the proposed soft switching PWM DC-DC power converter using IGBTs is evaluated and compared with a hard switching PWM DC-DC power converter.

Hard TiN Coating by Magnetron-ICP P $I^3$D

  • Nikiforov, S.A.;Kim, G.H.;Rim, G.H.;Urm, K.W.;Lee, S.H.
    • Journal of Surface Science and Engineering
    • /
    • v.34 no.5
    • /
    • pp.414-420
    • /
    • 2001
  • A 30-kV plasma immersion ion implantation setup (P $I^3$) has been equipped with a self-developed 6'-magnetron to perform hard coatings with enhanced adhesion by P $I^3$D(P $I^3$ assisted deposition) process. Using ICP source with immersed Ti antenna and reactive magnetron sputtering of Ti target in $N_2$/Ar ambient gas mixture, the TiN films were prepared on Si substrates at different pulse bias and ion-to-atom arrival ratio ( $J_{i}$ $J_{Me}$ ). Prior to TiN film formation the nitrogen implantation was performed followed by deposition of Ti buffer layer under A $r^{+}$ irradiation. Films grown at $J_{i}$ $J_{Me}$ =0.003 and $V_{pulse}$=-20kV showed columnar grain morphology and (200) preferred orientation while those prepared at $J_{i}$ $J_{Me}$ =0.08 and $V_{pulse}$=-5 kV had dense and eqiaxed structure with (111) and (220) main peaks. X-ray diffraction patterns revealed some amount of $Ti_{x}$ $N_{y}$ in the films. The maximum microhardness of $H_{v}$ =35 GN/ $M^2$ was at the pulse bias of -5 kV. The P $I^3$D technique was applied to enhance wear properties of commercial tools of HSS (SKH51) and WC-Co alloy (P30). The specimens were 25-kV PII nitrogen implanted to the dose 4.10$^{17}$ c $m^{-2}$ and then coated with 4-$\mu\textrm{m}$ TiN film on $Ti_{x}$ $N_{y}$ buffer layer. Wear resistance was compared by measuring weight loss under sliding test (6-mm $Al_2$ $O_3$ counter ball, 500-gf applied load). After 30000 cycles at 500 rpm the untreated P30 specimen lost 3.10$^{-4}$ g, and HSS specimens lost 9.10$^{-4}$ g after 40000 cycles while quite zero losses were demonstrated by TiN coated specimens.s.

  • PDF

Thermal analysis and optimization of the new ICRH antenna Faraday Screen in EAST

  • Q.C. Liang ;L.N. Liu ;W. Zhang ;X.J. Zhang ;S. Yuan ;Y.Z. Mao ;C.M. Qin;Y.S. Wang ;H. Yang
    • Nuclear Engineering and Technology
    • /
    • v.55 no.7
    • /
    • pp.2621-2627
    • /
    • 2023
  • In Experimental Advanced Superconducting Tokamak (EAST) experiments, to achieve long pulse and high-power ICRH system operation, a new kind of ICRH antenna has been designed. One of the most critical factors in limiting the operation of long pulse and high power is the intense heat load in the front face of the ICRH antenna, especially the Faraday Screen (FS). Therefore, the cooling channels of FS need to be designed. According to thermal-hydraulic analysis, the FS tubes are divided into several groups to achieve more excellent water cooling capability. The number of series and parallel tubes in one group is chosen as six. This antenna went into service in the spring of 2021, and it is delightful that the temperature distribution of the FS tube is below 400 ℃ in 14.5 s and 1.8 MW ICRH system operation. However, the active water-cooling design was not carried out on the upper and lower plates of FS, which led to severe ablations on that region under long pulse and high power operation, and the temperature is up to 800. Therefore, the upper and lower side plates of the FS were designed with water cooling based on thermal-hydraulic analysis. During the 2022 winter experiments, the temperature of ICRH antenna FS was lower than 400 in the pulse of 200s and the power of 1 MW operation.

Design of harmonic reduction equipment for load system (부하설비의 고조파 저감장치 설계)

  • Son, Jae-Hyun;Cho, Yang-Heang;Kim, Je-Hong
    • Proceedings of the KIEE Conference
    • /
    • 2006.10b
    • /
    • pp.224-228
    • /
    • 2006
  • The aim of this study is to design a passive filter for the elimination of harmonics. For this design, the harmonics wave generating from the six pulse rectifier was measured and its characteristics were analyzed. We also calculated the quantity of harmonic current by changing the system operational conditions. According to this field data and calculated results, we determined the elements of the passive filter. The simulation and experimental results indicate the efficiency of designed passive filter.

  • PDF