• Title/Summary/Keyword: programmable services

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Design and Analysis of Cell Controller Operation for Heat Process (열공정에 대한 셀 콘트롤러 운영의 설계와 해석)

  • So, Ye In;Jeon, Sang June;Kim, Jeong Ho
    • Journal of Platform Technology
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    • v.8 no.2
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    • pp.22-31
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    • 2020
  • The construction and operation of industrial automation has been actively taking place from manufacturing plan to production for improving operational efficiency of production line and flexibility of equipment. ISO/TC184 is standardizing on operating methods that can share information of programmable device controllers such as PLC and IoT that are geographically distributed in the production line. In this study, the design of the cell controller consists of PLC group and IoT group that perform signals such as temperature sensors, gas sensors, and pressure sensors for thermal processes and corresponding motors or valves. The operation and analysis of the cell controller were performed using SDN(Software Defined Network) and the three types of process services performed in thermal processes are real-time transmission service, loss-sensitive large-capacity transmission service, and normal transmission service. The simulation result showed that the average loss rate improved by about 17% when the traffic increased before and after the application of the SDN route technique, and the delay in the real-time service was as low as 1 ms.

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Design of Object-Oriented Cideo Controller based on Stack (스택기반 객체 지향형 영상 제어기 설계)

  • 박주현;김영민
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.7
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    • pp.69-77
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    • 1998
  • In this paper, a controller is designed for efficient controlling of video data with object-oriented feature. The need of controlling video data in an object unit is on the rise for the reason of rapidly growing demand for high-quality video services. We propose a programmable architecture with stack buffers which can minimize a scheduling overhead by having separate buffes for genral data and return addresses. The buffers are veyr useful for move and copy operations for multitasking and task switching. The controller offers extended instructions that process several data types including 32bit integrer type. Operation speed of the controller is from 77MHz to 44MHz.

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Preprocessing for High Quality Real-time Imaging Systems by Low-light Stretch Algorithm

  • Ngo, Dat;Kang, Bongsoon
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.585-589
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    • 2018
  • Consumer demand for high quality image/video services led to growing trend in image quality enhancement study. Therefore, recent years was a period of substantial progress in this research field. Through careful observation of the image quality after processing by image enhancement algorithms, we perceived that the dark region in the image usually suffered loss of contrast to a certain extent. In this paper, the low-light stretch preprocessing algorithm is, hence, proposed to resolve the aforementioned issue. The proposed approach is evaluated qualitatively and quantitatively against the well-known histogram equalization and Photoshop curve adjustment. The evaluation results validate the efficiency and superiority of the low-light stretch over the benchmarking methods. In addition, we also propose the 255MHz-capable hardware implementation to ease the process of incorporating low-light stretch into real-time imaging systems, such as aerial surveillance and monitoring with drones and driving aiding systems.

High Performance IP Fowarding Engine for ATM based Gigabit Routers

  • Park, Byeong-Cheol;Park, Chang-Sik;Jeong, Youn-Kwae;Lee, Jeong-Tae
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.533-536
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    • 2000
  • In this paper, we proposed high performance packet forwarding engine for asynchronous transfer mode(ATM) based gigabit routers. The forwarding engine is based on ATM switch and accommodates four 622Mbps ports. The forwarding engine has been designed to be able to process the Intemet protocol(IP) packet at 2.5Gbps using the pipelined If header processing and lookup control mechanism. For high performance packet forwarding, we used content addressable memory(CAM) based routing coprocessor operating in hardware and implemented the pipelined lookup control function into a field programmable gate array(FPGA). The pipelined packet header processing mechanism enhanced the forwarding performance of the If packets ingressed from four different 622Mbps ports. Moreover, the If lookup controller designed to have the performance up to 12.5Mpps. The proposed forwarding engine is also designed to support differentiated services(DS) and multiprotocol label switching(MPLS).

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Integrated Lighting Enabler System Using M2M Platforms for Enhancing Energy Efficiency

  • Abdurohman, Maman;Putrada, Aji Gautama;Prabowo, Sidik;Wijiutomo, Catur Wirawan;Elmangoush, Asma
    • Journal of Information Processing Systems
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    • v.14 no.4
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    • pp.1033-1048
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    • 2018
  • This paper proposes an integrated lighting enabler system (ILES) based on standard machine-to-machine (M2M) platforms. This system provides common services of end-to-and M2M communication for smart lighting system. It is divided into two sub-systems, namely end-device system and server system. On the server side, the M2M platform OpenMTC is used to receive data from the sensors and send response for activating actuators. At the end-device system, a programmable smart lighting device is connected to the actuators and sensors for communicating their data to the server. Some experiments have been done to prove the system concept. The experiment results show that the proposed integrated lighting enabler system is effective to reduce the power consumption by 25.22% (in average). The proving of significance effect in reducing power consumption is measured by the Wilcoxon method.

Study on Safety Assessment for Train Control Communication Systems (열차제어 통신시스템의 안전성 평가를 위한 연구)

  • Jo, Hyun-Jeong;Hwang, Jong-Gyu;Jeong, Rak-Gyo
    • Proceedings of the KIEE Conference
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    • 2009.04b
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    • pp.186-188
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    • 2009
  • Safety-critical systems related to the railway communications are currently undergoing changes. Mechanical and electro-mechanical devices are being replaced by programmable electronics that are often controlled remotely via communication networks. Therefore designers and operators now not only have to contend with component failures and user errors, but also with the possibility that malicious entities are seeking to disrupt the services provided by theirs systems. This paper discusses the safety strategies employed in the railway communications and proposes a security mechanism for Korean railway communication system.

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Direct Sequence Spread Spectrum Transmitter using FPGAs

  • Abhijit S. Pandya;Souza, Ralph-D′;Chae, Gyoo-Yong
    • Journal of information and communication convergence engineering
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    • v.2 no.2
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    • pp.76-79
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    • 2004
  • The DS-SS (Direct Sequence Spread Spec1nun) transmitter is part of a low data rate (∼150 kbps - burst rate and 64 bps - average data rate) wireless communication system. It is traditionally implemented using Digital Signal processing chip (DSP). However, with rapid increase in variety of services through cell phones, such as, web access, video transfer, online games etc. demand for higher rate is increasing steadily. Since the chip rate and thereby the sampling rate requirements of the system are fairly high, the transmitter should implemented using Field programmable Gate Arrays FPGAs instead of a DSP. This paper shows the steps taken to get a working prototype of the transmitter unit on a FPGA based platform.

A High PErformance Lookup Controller for ATM based IP Packet Forwarding Engine (ATM 기반 IP 패킷 포워딩 엔진을 위한 고성능 룩업 제어기)

  • Choi, Byeong-Cheol;Kwak, Dong-Yong;Lee, Jeong-Tae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.4B
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    • pp.298-305
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    • 2003
  • In this paper, we proposed a high performance lookup controller for IP packet forwarding engine of ATM based label edge routers. The lookup controller is designed to provide services such as MPLS, VPN, ELL, and RT services as well as the best effort. For high speed searching for IP addresses, we employed a TCAM based hardware search device not using traditional algorithmic approaches. We also implement lookup control functions into FPGA for fast processing of packet header and lookup control. The proposed lookup controller is designed to support differenciated services for users and to process in pipelined mechanism for performance improvement. A two-step search scheme is also applied to perform lookup for the key combined with multi-field of packet header. We found that the proposed lookup controller provides the performance of about 16M packets per second through simulations.

Design and Architecture of Low-Latency High-Speed Turbo Decoders

  • Jung, Ji-Won;Lee, In-Ki;Choi, Duk-Gun;Jeong, Jin-Hee;Kim, Ki-Man;Choi, Eun-A;Oh, Deock-Gil
    • ETRI Journal
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    • v.27 no.5
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    • pp.525-532
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    • 2005
  • In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de)interleaving and iterative decoding in a conventional maximum a posteriori turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is from the combination of the radix-4, center to top, parallel decoding, and early-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit error rate performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. To prove the latency reduction, we implemented the proposed scheme on a field-programmable gate array and compared its decoding speed with that of a conventional decoder. The results show an improvement of at least five fold for a single iteration of turbo decoding.

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Implementation of Methodology & Tool for Communication Safety Guarantee in Railway System (철도시스템 통신 안전성 확보를 위한 방법 제시 및 도구 구현)

  • Jo, Hyun-Jeong;Hwang, Jong-Gyu;Kim, Yong-Kyu
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.59 no.1
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    • pp.10-17
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    • 2010
  • Safety-critical systems related to the railway communications are currently undergoing changes. Mechanical and electro-mechanical devices are being replaced by programmable electronics that are often controlled remotely via communication networks. Therefore designers and operators now not only have to contend with component failures and user errors, but also with the possibility that malicious entities are seeking to disrupt the services provided by theirs systems. Recognizing the safety-critical nature of the types of communications required in train control operations, the communications infrastructure will be required to meet a number of safety requirements such as system faults, user errors and the robustness in the presence of malicious attackers who are willing to take determined action to interfere in the correct operation of a system. In this paper, we proposed the safety strategies employed in the railway communications and a security mechanism for Korean railway communication system. Also, we presented the developed means for validation and determination of communication safety based on the proposed security mechanism in the railway system.