• Title/Summary/Keyword: programmable networks

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A NetFPGA-based IP Service Gateway for the Composition of Service Overlay Networks (서비스 오버레이 네트워크의 구성을 위한 NetFPGA 기반의 IP 서비스 게이트웨이)

  • Jo, Jin-Yong;Lee, So-Yeon;Kong, Jong-Uk;Kim, Jong-Won
    • The KIPS Transactions:PartC
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    • v.18C no.6
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    • pp.413-422
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    • 2011
  • Overlay network is a ready-to-use solution to enable new network functionality with existing Internet connectivity intact. This paper introduces a network service which helps users easily compose their own service overlay networks through software-defined networks. We look into the structure of service gateway which enables 1 Gbps packet processing on composed overlay networks. We also provide examples for the way of composing service overlay for support multicast applications. Experiment results carried over the KREONET (Korea Research Environment Open NETwork) show the forwarding performance of the service gateway.

Automated optimization for memory-efficient high-performance deep neural network accelerators

  • Kim, HyunMi;Lyuh, Chun-Gi;Kwon, Youngsu
    • ETRI Journal
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    • v.42 no.4
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    • pp.505-517
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    • 2020
  • The increasing size and complexity of deep neural networks (DNNs) necessitate the development of efficient high-performance accelerators. An efficient memory structure and operating scheme provide an intuitive solution for high-performance accelerators along with dataflow control. Furthermore, the processing of various neural networks (NNs) requires a flexible memory architecture, programmable control scheme, and automated optimizations. We first propose an efficient architecture with flexibility while operating at a high frequency despite the large memory and PE-array sizes. We then improve the efficiency and usability of our architecture by automating the optimization algorithm. The experimental results show that the architecture increases the data reuse; a diagonal write path improves the performance by 1.44× on average across a wide range of NNs. The automated optimizations significantly enhance the performance from 3.8× to 14.79× and further provide usability. Therefore, automating the optimization as well as designing an efficient architecture is critical to realizing high-performance DNN accelerators.

Using PC for Connection Between LONWORKS System and The Internet (PC를 이용한 LONWORKS 시스템과 인터넷의 연결 구현)

  • Park, Jin-Seok;Shim, Il-Joo;Kim, Beom-Soo;Leem, Chae-Sung;Park, Gwi-Tae
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.443-449
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    • 2002
  • In this paper, we propose a programmable method that can connect the control network with the Internet by using an ordinary PC, which is operated by GNU/LINUX. We make a physical connection between an ordinary PC and control network. Then, a PC can be bound with a particular control network. Moreover, numerous PCs that are bound with particular control networks have addresses of there own on the Internet. So, these PCs are connected each other very well. Consequently, all control networks can be observed and controlled with data transfer between these PCs.

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Extracting Graphics Information for Better Video Compression

  • Hong, Kang Woon;Ryu, Won;Choi, Jun Kyun;Lim, Choong-Gyoo
    • ETRI Journal
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    • v.37 no.4
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    • pp.743-751
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    • 2015
  • Cloud gaming services are heavily dependent on the efficiency of real-time video streaming technology owing to the limited bandwidths of wire or wireless networks through which consecutive frame images are delivered to gamers. Video compression algorithms typically take advantage of similarities among video frame images or in a single video frame image. This paper presents a method for computing and extracting both graphics information and an object's boundary from consecutive frame images of a game application. The method will allow video compression algorithms to determine the positions and sizes of similar image blocks, which in turn, will help achieve better video compression ratios. The proposed method can be easily implemented using function call interception, a programmable graphics pipeline, and off-screen rendering. It is implemented using the most widely used Direct3D API and applied to a well-known sample application to verify its feasibility and analyze its performance. The proposed method computes various kinds of graphics information with minimal overhead.

on-line Modeling of Nonlinear Process Systems using the Adaptive Fuzzy-neural Networks (적응퍼지-뉴럴네트워크를 이용한 비선형 공정의 온-라인 모델링)

  • 오성권;박병준;박춘성
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.10
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    • pp.1293-1302
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    • 1999
  • In this paper, an on-line process scheme is presented for implementation of a intelligent on-line modeling of nonlinear complex system. The proposed on-line process scheme is composed of FNN-based model algorithm and PLC-based simulator, Here, an adaptive fuzzy-neural networks and HCM(Hard C-Means) clustering method are used as an intelligent identification algorithm for on-line modeling. The adaptive fuzzy-neural networks consists of two distinct modifiable sturctures such as the premise and the consequence part. The parameters of two structures are adapted by a combined hybrid learning algorithm of gradient decent method and least square method. Also we design an interface S/W between PLC(Proguammable Logic Controller) and main PC computer, and construct a monitoring and control simulator for real process system. Accordingly the on-line identification algorithm and interface S/W are used to obtain the on-line FNN model structure and to accomplish the on-line modeling. And using some I/O data gathered partly in the field(plant), computer simulation is carried out to evaluate the performance of FNN model structure generated by the on-line identification algorithm. This simulation results show that the proposed technique can produce the optimal fuzzy model with higher accuracy and feasibility than other works achieved previously.

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Wireless Mobile Sensor Networks with Cognitive Radio Based FPGA for Disaster Management

  • Ananthachari, G.A. Preethi
    • Journal of Information Processing Systems
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    • v.17 no.6
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    • pp.1097-1114
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    • 2021
  • The primary objective of this work was to discover a solution for the survival of people in an emergency flood. The geographical information was obtained from remote sensing techniques. Through helpline numbers, people who are in need request support. Although, it cannot be ensured that all the people will acquire the facility. A proper link is required to communicate with people who are at risk in affected areas. Mobile sensor networks with field-programmable gate array (FPGA) self-configurable radios were deployed in damaged areas for communication. Ad-hoc networks do not have a centralized structure. All the mobile nodes deploy a temporary structure and they act as a base station. The mobile nodes are involved in searching the spectrum for channel utilization for better communication. FPGA-based techniques ensure seamless communication for the survivors. Timely help will increase the survival rate. The received signal strength is a vital factor for communication. Cognitive radio ensures channel utilization in an effective manner which results in better signal strength reception. Frequency band selection was carried out with the help of the GRA-MADM method. In this study, an analysis of signal strength for different mobile sensor nodes was performed. FPGA-based implementation showed enhanced outcomes compared to software-based algorithms.

A Structural Testing Strategy for PLC Programs Specified by Function Block Diagram (함수 블록 다이어그램으로 명세된 PLC 프로그램에 대한 구조적 테스팅 기법)

  • Jee, Eun-Kyoung;Jeon, Seung-Jae;Cha, Sung-Deok
    • Journal of KIISE:Software and Applications
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    • v.35 no.3
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    • pp.149-161
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    • 2008
  • As Programmable Logic Controllers(PLCs) are frequently used to implement real-time safety critical software, testing of PLC software is getting more important. We propose a structural testing technique on Function Block Diagram(FBD) which is one of the PLC programming languages. In order to test FBD networks, we define templates for function blocks including timer function blocks and propose an algorithm based on the templates to transform a unit FBD into a flowgraph. We generate test cases by applying existing testing techniques to the generated flowgraph. While the existing FBD testing technique do not consider infernal structure of FBD to generate test cases and can be applied only to FBD from which the specific intermediate model can be generated, this approach has advantages of systematic test case generation considering infernal structure of FBD and applicability to any FBD without regard to its intermediate format. Especially, the proposed method enables FBD networks including timer function blocks to be tested thoroughly. To demonstrate the effectiveness of the proposed method, we use trip logic of bistable processor of digital nuclear power plant protection systems which is being developed in Korea.

Networked Intelligent Motor-Control Systems Using LonWorks Fieldbus

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.11a
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    • pp.365-370
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    • 2004
  • The integration of intelligent devices, devices-level networks, and software into motor control systems can deliver improved diagnostics, fast warnings for increased system reliability, design flexibility, and simplified wiring. Remote access to motor-control information also affords an opportunity for reduced exposure to hazardous voltage and improved personnel safety during startup and trouble-shooting. This paper presents LonWorks fieldbus networked intelligent induction control system architecture. Experimental bed system with two inverter motor driving system for controlling 1.5kW induction motor is configured for LonWorks networked intelligent motor control. In recent years, MCCs have evolved to include component technologies, such as variable-speed drives, solid-state starters, and electronic overload relays. Integration was accomplished through hardwiring to a programmable logic controller (PLC) or distributed control system (DCS). Devicelevel communication networks brought new possibilities for advanced monitoring, control and diagnostics. This LonWorks network offered the opportunity for greatly simplified wiring, eliminating the bundles of control interwiring and corresponding complex interwiring diagrams. An intelligent MCC connected in device level control network proves users with significant new information for preventing or minimizing downtime. This information includes warnings of abnormal operation, identification of trip causes, automated logging of events, and electronic documentation. In order to show the application of the multi-motors control system, the prototype control system is implemented. This paper is the first step to drive multi-motors with serial communication which can satisfy the real time operation using LonWorks network.

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Hardware Implementation of Discrete-Time Cellular Neural Networks Using Distributed Arithmetic (분산연산 방식을 이용한 이산시간 Cellular 신경회로망의 하드웨어 구현)

  • Park, Sung-Jun;Lim, Joon-Ho;Chae, Soo-Ik
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.1
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    • pp.153-160
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    • 1996
  • In this paper, we propose an efficient digital architecture for the discrete-time cellular neural networks (DTCNN's). DTCNN's have the locality and the translation invariance in the templates which determine the patterns of the connection between the cells. Using distributed arithmetic (DA) and the characteristics of DTCNN, we propose a simple implementation of DTCNN. The bus width in the cell-to-cell interconnection is reduced to one bit because of DA's bitwise operation. We implemented the reconfigurable architecture of DTCNN using programmable FPGA.

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Rapid Implementation of the MAC and Interface Circuits fot the Wireless LAN Cards Using FPGA

  • Jiang, Songchar
    • Journal of Communications and Networks
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    • v.1 no.3
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    • pp.201-212
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    • 1999
  • This paper studies the rapid design and implementation of the medium access control(MAC) and related interface circuits for 802.11 wireless LANs based on the field programmed gate ar-ray(FPGA) technology. Our design is thus aimed to support both the distributed coordination function (DCF) and the point coordination function(PCF) with the aid of FPGA technology. Further-more, in an infrastructure network, some stations may serve as the access points (APs) which may function like a learning bridge. This paper will also discuss how to design for such application. The hardware of the MAC and interface may at least consist of three major parts: wireless transmission and reception processes and in-terface, host(bus) interface, and the interface to the distributed system (optional). Through the increasing popularity of FPGA de-sign, this paper presents how Complex Programmable Logic De-vices(CPLD) can be utilized for speedy design of prototypes. It also demonstrates that there is much room for low-cost hardware prototype design to accelerate the processing speed of the MAC control function and for field testing.

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