• Nuclear Engineering and Technology
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• v.41 no.1
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• pp.79-90
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• 2009

Verification of programmable logic controller (PLC) programs written in IEC 61131-3 function block diagram (FBD) is essential in the transition from the use of traditional relay-based analog systems to PLC-based digital systems. This paper describes effective use of the well-known verification tool VIS for automatic verification of behavioral equivalences between successive FBD revisions. We formally defined FBD semantics as a state-transition system, developed semantic-preserving translation rules from FBD to Verilog programs, implemented a software tool to support the process, and conducted a case study on a subset of FBDs for APR-1400 reactor protection system design.

• Progress in Superconductivity
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• v.7 no.1
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• pp.11-16
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• 2005

Coupling of non-linear oscillators have long been an interesting problem for physicists. The coupling phenomena have been frequently observed in Josephson junction series array, which have been used for Josephson voltage standard. Interestingly pronounced self-generation effect has been found during recent development of Josephson arrays for programmable Josephson voltage standard. But the coupling effect between the self-generations is not fully understood yet. We present harmonically approximated analytical solutions for coupled self-generations in the Josephson arrays, i.e., Superconductor-Insulator-Normal metal-Insulator-Superconductor (SINIS) array, externally shunted Superconductor-Insulator-Supercondctor (es-SIS) array, Superconductor-Normal metal-Superconductor (SNS) array. We find that the coupling between the self-generated Josephson oscillations through microwave transmission line plays critical role in microwave property of the Josephson array.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.1
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• pp.73-80
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• 2004

We have developed a general purpose motion controller using an FPGA(Field Programmable Gate Array). The multi-PID controllers and GUI are implemented as a system-on-chip for multi-axis motion control. Comparing with the commercial motion controller LM 629, since it has multi-independent PID controllers, we have several advantages such as space effectiveness, low cost and lower power consumption. In order to test the performance of the proposed controller, motion of the robot hand is controlled. The robot hand has three fingers with 2 joints each. Finger movements show that tracking was very effective. Another experiment of balancing an inverted pendulum on a cart has been conducted to show the generality of the proposed FPGA PID controller. The controller has well maintained the balance of the pendulum.

• 제어로봇시스템학회:학술대회논문집
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• 1990.10a
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• pp.634-638
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• 1990

In this paper, the architecture of a dataflow logic solving processor for programmable logic controller is proposed. As the proposed DFLSP (dataflow logic solving processor) is designed based on the dataflow architecture, it has inherently concurrent processing and data synchronization capabilities. The proposed DFLSP is adequate for high speed programmable logic controllers and gets rid of data synchronization problem in hardware level. The performance of the proposed DFLSP is analyzed using computer simulations and prototype hardware. With single processing element, the logic solving time is 144 usec per 1K steps of logic program and with eight processing elements, the logic solving time is 23 usec per 1K steps of logic program with reasonable assumptions.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.413-418
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• 1987

The software developed for the large scale Programmable Controller consists of the programmer's S/W, the Controller's S/W the RBC's (Remote Base Controller's) S/W and the Analog's S/W. The programmer's S/W, running on the Programmer, includes the editor, the compiler, the communication program, and some other programs for easy use. The Controller S/W, which requires the fast scanning time, consists of the BTI( Block Type Instruction) solving program, the timer service routine, the i/o update program, the communication program and etc. The RBC's S/W includes the communication program, the error recovery program and the i/o processing program. The analog S/W, controlled by the Programmer, includes the PID program. The data communication between the Programmer and the Controller the Controller and the RBC, and the RBC and the Analog are developed.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.1
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• pp.47-54
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• 2012

This paper presents implementation of SVPWM technique for three phase Voltage Source Inverter using FPGA. Software-based vector-control calculations much this drawback, in order to improve the hardware-vector-control tries. Without the need for additional software, vector control algorithm is designed to be modular SOPC, and DSP will reduce most of the operations. In this paper, the SVPWM that using HDL for the AC motor vector control algorithm level, and the dead time part and the speed control in order to controled a speed detector and designed in the form of modules. Then ALTERA corporation Cyclone III series EP3C16F484 can be verified by implemented.

• Journal of Korea Multimedia Society
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• v.9 no.11
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• pp.1515-1528
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• 2006

Systems for physically based fluid animation have developed rapidly in the visual special effects industry and can make very high quality images. However, in the real-time application fields such as computer game, the simulation speed is more critical issue than image quality. This paper presents a real-time method for animating fluid using programmable graphics pipeline. We show that once two key-frames are given, the technique can interactively generate a sequence of images changing from the source key-frame to the target.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.348-351
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• 2003

항로표지(Aids to Navigation)란 빛, 형상, 색채, 전파, 음향 등으로 안전한 항로를 표시하여 선박 항행의 안전성을 확보하기 위하여 인위적으로 설치하는 시설이다. 특히, 등대(Lighthouse)는 항로표지 중 가장 중요한 것으로 선박이 육지나 주요 변침점(Turning Point) 또는 선박 위치를 확인하기 위하여 연안에 설치하거나 항만의 소재, 항구 등을 나타내기 위하여 설치한 구조물이다. 본 논문에서는 선박의 입ㆍ출항에 관련하여 선박의 안전을 위해서 설치되어 있는 등대의 효율적인 관리 및 운영을 위한 등대 동기 제어 시스템의 개발에 관한 연구이다. 이를 위해서, 등대 동기 제어 시스템은 하드웨어(컨트롤 박스)와 소프트웨어(제어 프로그램)로 나누어 구성하였다. 하드웨어 모듈은 등대와 선박의 입ㆍ출항에 관한 업무를 담당하는 관제소 사이의 인터페이스를 제공한다. 즉, 등대의 점멸등 제어를 위한 제어부와 등대와 관리 시스템사이의 데이터 전송을 위한 통신 인터페이스를 마이크로컨트롤러의 한 종류인 PIC(Programmable Interrupt Controller)를 이용하여 구성하였다. 소프트웨어 모듈은 시스템 운영자가 등대를 간편하고 효율적으로 관리하기 위해서 GUI(Graphical User Interface) 형태의 인터페이스를 제공한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.9B
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• pp.1314-1320
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• 2001

최근 전화선과 같이 기존에 존재하는 전송선로를 이용하여 고속의 데이터를 전송할 수 있는 DSL 모뎀 개발에 많은 연구가 활발히 진행되고 있다. DSL 모뎀과 같이 열악한 특성과 제한된 대역폭을 갖는 채널을 통하여 고속의 데이터를 전송하기 위해서는 복잡한 변조방식과 우수한 채널부호(FEC) 알고리즘이 요구된다. 특히, ADSL 시스템 및 VDSL 시스템에서는 다양한 오류정정 능력을 갖는 RS(Reed-Solomon) 부호를 사용하도록 권고하고 있다. 이에 대해, 본 논문에서는 ADSL 및 VDSL 시스템의 권고 안(오류정정 능력(t) = 0∼8)을 만족하는 RS 부호를 한 조의 RS 부호기 및 복호기로 대체할 수 있는 설계구조를 제시한다. 제시된 구조는 8조의 RS 부호가 갖는 면적의 약 23%만으로, t=8인 RS 부호에 대해 약 6%의 추가 면적으로 설계할 수 있다.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.12
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• pp.661-666
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• 2006

Interlocking signalling system plays key role as core system to manage railway operation. The core role of railway operation is to control routing, displaying signal and regulation for train. Interlocking system relate tightly to railway accident because collision and derailment is sometime taken place wrong route setting and signal displaying. Safety activity for interlocking system is inevitable to avoid the accident over its life cycle. The safety activity includes hazard identification and analysis, safety requirement allocation, safety plan, safety activity and ao on. The safety activity need a broad wide range work. In this paper, we concentrate on hazard identification for generic interlocking system and programmable electronic interlocking system and compare between two results. The hazards will be used for safety activity.