• 제목/요약/키워드: program counter

검색결과 175건 처리시간 0.024초

RSFQ Toggle Flip-Flop 회로의 최적화를 통한 Program Counter의 개발 (Development of Program counter through the optimization of RSFQ Toggle Flip-Flop)

  • 백승헌;김진영;김세훈;강준희
    • 한국초전도ㆍ저온공학회논문지
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    • 제7권1호
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    • pp.17-20
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    • 2005
  • We has designed, fabricated, and measured a Single flux quantum (SFQ) toggle flip-flop (TFF). The TFF is widely used in superconductive digital electronics circuits. Many digital devices, such as frequency counter, counting ADC and program counter be used TFF Specially, a program counter may be constructed based on TFF We have designed the newly TFF and obtained high bias margins on test. In this work, we used two circuit simulation tools, WRspice and Julia, as circuit optimization tools. We used XIC for a layout tool. Newly designed TFF had minimum bias margins of +/- $37\%$ and maximum bias margins of +/-$37\%$(enhanced from +/- $37\%$). The designed circuits were fabricated by using Nb technology The test results showed that the re-optimized TFF operated correctly on 100kHz and had a very wide bias margins of +/- $53\%$.

8051 마이크로 콘트롤러를 이용한 휴대용 방사능 측정기의 카운터 프로그램 연구 (A Study on the Counter Program of the Radiation Detector Using 8051 Micro-controller)

  • 김용득;박세광
    • 센서학회지
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    • 제6권3호
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    • pp.228-236
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    • 1997
  • 방사성 물질은 인체에 매우 위험하여 정확한 제어와 유출 방지 및 정확한 측정의 필요성이 요구된다. 본 논문에서는 GM 계수기를 사용하여 방사성 물질의 양을 정확히 측정할 수 있는 시스템을 설계하였으며, 계수 프로그램과 측정한 데이터를 저장하거나 외부 장치로 전송향 수 있는 운용 프로그램을 개발하였다. 제작한 시스템과 계수 프로그램은 국내외에서 개발하고 있는 GM 계수관형 방사선 측정기로 원자력 발전소 및 연구소에서 띠러 가지 방식으로 활용될 수 있도록 설계되었다.

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향류형 냉각탑의 기본설계 프로그램 개발 (Program Development for Design of Counter-flow Cooling Tower)

  • 고광호;인종수;오태일
    • 한국산업융합학회 논문집
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    • 제7권4호
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    • pp.383-389
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    • 2004
  • This paper is to develop the program for sizing of a counter-flow cooling tower. Air flow, air exit tmperature, fan power are calculated from design coditions of cooling tower by using this program. The basic equations and solutions of the heat transfer and pressure drop of cooling tower are descrived and the algorithm development for design of cooling tower is performed. The variation of fan power of cooling tower in acoording to variation of cell area and fill height is performed by using this program. This result shows that the optimal design for install and running cost of cooling tower can be performed by using this program.

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장비정도관리에 Calibrator[I-125] Set 적용 (The Application of New Calibrator[I-125]Set for Equipment Quality Management)

  • 김지나;안재석;원우재
    • 핵의학기술
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    • 제19권2호
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    • pp.108-111
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    • 2015
  • Purpose Lately, in accordance with the increasing interest about Healthcare accreditation program and International laboratory accreditation scheme, requirements about the instrument quality management are gradually taking shape. In nuclear medicine In vitro laboratory, the most typical instruments are multi detector gamma counter and automatic dispensing system. Each laboratory continue with the quality control adequate for circumstances. The purpose of this study is to application and establish the new Calibrator[I-125]Set which is efficient at standardization of equipment quality management. Materials and Methods Deviation between detectors were measured with 12 solid samples of the Calibrator[I-125]Set. their activities differ from each other by less than 1%. Multi detector gamma counters are GAMMA-10;Shinjin medics. Inc, Goyansi, Korea(Gamma counter A), SR300;Stratec biomedical systems AG, Gewerbestr, Germany(Gamma counter B) and COBRA II; Packard Instrument Co. Inc, Meriden, USA(Gamma counter C). Evaluation of two automatic dispensing system used A, B liquid tracer of the Calibrator[I-125]Set. After dispensing and counting, calculated using the ratio of the measured value and proposed value. We used solution A for 20, 25ul and solution B for 50, 100ul. Method of data analysis and reference range was provided by kit documentation. Furthermore, we could calculate our counter efficiency indirectly. Results The CV(%) of measured values by Gamma counter A, B, C are 0.34, 0.70, 1.30. Calculated value are 1.05314, 2.10419, 4.08485. Provided reference range is less than 3. A dispensing system's calculated values are 0.986, 0.989, 1.023, 1.017 and B are 0.874, 0.725, 1.021, 0.904. Provided reference range is from 0.95 to 1.05. Also, counter's efficiency are 74.18, 72.79, 74.32% at counter A, B, C and efficiency of the one detector counter is 79.26%. Conclusion If using this Calibrator[I-125]Set after verifying whether quality assurance, is applicable to equipment quality management on behalf of the role of gold standard.

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W형 및 V형 왕복동 공기압축기의 평형추 설계 (Counter weight design for a W/V type reciprocating air compressor)

  • 김영철;성세제;김영주;최상규
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2002년도 춘계학술대회논문집
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    • pp.227-233
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    • 2002
  • For the purpose of high outlet pressure, compactness and low vibration and noise, modem reciprocating air compressors are tend to have a multi-stage W-type or V-type cylinder arrangement. An effective counter weight calculation method is presented for reducing the inertia forces of the compressor. This calculation method is using the complex representation and verified its validity. A design program for the counter weight of W-type or V-type air compressor was presented to the manufacturer, A designed counter weight was attached to the W-type or V-type air compressor. Vibration test results gave us improved performance.

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Radar Transceiver용 X-밴드 PLL 주파수 합성기 설계 및 제작 (Design And Implementation of X-Band Frequency Synthesizer for Radar Transceiver)

  • 이현수;박동국
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2005년도 종합학술발표회 논문집 Vol.15 No.1
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    • pp.137-140
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    • 2005
  • A frequency synthesizer of 10 GHz $\sim$ 11 GHz for FMCW radar is designed and implemented by the form of indirect frequency synthesizer of a single loop structure. The synthesizer uses a high speed digital PLL chip. It is difficult to divide directly by using a program counter of PLL chip because the output frequency of VCO is 10 GHz $\sim$ 11 GHz, so we lower the frequency to 625 MHz $\sim$ 687.5 MHz by using a prescaler, and then divide the frequency by the program counter. The output frequency sweep of VCO from 10 GHz to 11 GHz is measured.

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레이더 송수신기용 X 밴드 주파수 합성기 개발 (Development of X-band frequency synthesizer for radar transceiver)

  • 이현수;박동국;이수태;김진영
    • 한국마린엔지니어링학회:학술대회논문집
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    • 한국마린엔지니어링학회 2005년도 후기학술대회논문집
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    • pp.208-209
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    • 2005
  • A frequency synthesizer of 10 GHz ${\sim}$ 11 GHz for FMCW radar is designed and implemented by the form of indirect frequency synthesizer of a single loop structure. The synthesizer uses a high speed digital PLL chip. It is difficult to divide directly by using a program counter of PLL chip because the output frequency of VCO is 10 GHz ${\sim}$ 11 GHz, so we lower the frequency to 625 MHz ${\sim}$ 687.5 MHz by using a prescaler, and then divide the frequency by the program counter. The output frequency sweep of VCO from 10 GHz to 11 GHz is measured.

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리커다인을 이용한 파력발전기 동적거동 연구 (Study on the Dynamic Behaviors of Wave Energy Converter by using RecurDyn)

  • 손정현;전철웅;김민수
    • 동력기계공학회지
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    • 제21권2호
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    • pp.35-40
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    • 2017
  • In this study, the multi-body dynamics model for a wave energy converter is established. The equations of motions for the mechanical parts of the wave energy converter are derived to analyze the dynamic behavior. A spring method with the same performance as the counter weight method is proposed. The counter weight method and spring method are analyzed for evaluating the performance of the wave energy converter. RecurDyn program which is a kind of commercial multi-body dynamics program is used to perform the dynamic simulation of the wave energy converter.

RISC 프로세서의 프로그램 카운터 부(PCU)의 설계 (The Design of A Program Counter Unit for RISC Processors)

  • 홍인식;임인칠
    • 대한전자공학회논문지
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    • 제27권7호
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    • pp.1015-1024
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    • 1990
  • This paper proposes a program counter unit(PCU) on the pipelined architecture of RISC (Reduced Instruction Set Computer) type high performance processors, PCU is used for supplying instruction addresses to memory units(Instruction Cache) efficiently. A RISC processor's PCU has to compute the instruction address within required intervals continnously. So, using the method of self-generated incrementor, is more efficient than the conventional one's using ALU or private adder. The proposed PCU is designed to have the fast +4(Byte Address) operation incrementor that has no carry propagation delay. Design specifications are taken by analyzing the whole data path operation of target processor's default and exceptional mode instructions. CMOS and wired logic circuit technologic are used in PCU for the fast operation which has small layout area and power dissipation. The schematic capture and logic, timing simulation of proposed PCU are performed on Apollo W/S using Mentor Graphics CAD tooks.

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SISD 머신에 부착 가능한 SIMD 벡터 머신의 개념적 설계 (On the Conceptual Design of the SIMD Vector Machine Attachable to SISD Machine)

  • 조영일;고영웅
    • 정보처리학회논문지A
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    • 제12A권3호
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    • pp.263-272
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    • 2005
  • 데이터 주소의 계수를 위한 하드웨어 설계가 없는 본 노이만(von Neuman) 개념(SISD)의 컴퓨터에서 데이터의 주소지정은 소프트웨어적으로 수행된다. 그러므로 벡터 데이터 요소들의 주소지정은 인덱싱 기법에 의해 그 요소 수만큼 해당 변수들을 만들어서 사용해야 한다. 이것은 데이터 계수기 없이 명령어 계수기, 즉 PC(program counter)만 하드웨어로 설계되기 때문이다. 본 연구에서는 중앙처리장치 외부에 외형적 구조와 크기를 갖는 단위 벡터의 요소를 액세스하는 하드웨어 유닛의 설계를 제안한다. 벡터 처리는 고속처리가 전제되기 때문에 파이프라인 처리기법(SIMD)으로 설계되어야 한다. 제안한 방법은 시뮬레이션을 통하여 성능 검증을 하였으며, 실험 결과 동일한 프로세싱 유닛을 가지는 벡터 머신 아키텍쳐보다 $12-30\%$ 정도 우수한 성능을 내는 것을 확인하였다.