• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 1994.11a
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• pp.21-26
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• 1994

Conventional electroexplosive devices (EED) commonly use a very small metal bridgewire to ignite explosive materials i.e. pyrotechnics, primary and secondary explosives. The use of semiconductor devices to replace “hot-wire” resistance heating elements in automotive safety systems pyrotechnic devices has been under development for several years. In a typical 1 amp/1 watt electroexplosive devices, ignition takes place a few milliseconds after a current pulse of at least 25 mJ is applied to the bridgewire. In contrast, as for a SCB devices, ignition takes place in a few tens of microseconds and only require approximately one-tenth the input energy of a conventional electroexplosive devices. Typically, when SCB device is driven by a short (20 $\mu\textrm{s}$), low energy pulse (less than 5 mJ), the SCB produces a hot plasma that ignites explosive materials. The advantages and disadvantages of this technology are strongly dependent upon the particular technology selected. To date, three distinct technologies have evolved, each of which utilizes a hot, silicon plasma as the pyrotechnic initiation element. These technologies are 1.) Heavily doped silicon as the resistive heating initiation mechanism, 2.) Tungsten enhanced silicon which utilizes a chemically vapor deposited layer of tungsten as the initiation element, and 3.) a junction diode, fabricated with standard CMOS processes, which creates the initial thermal environment by avalanche breakdown of the diode. This paper describes the three technologies, discusses the advantages and disadvantages of each as they apply to electroexplosive devises, and recommends a methodology for selection of the best device for a particular system environment. The important parameters in this analysis are: All-Fire energy, All-Fire voltage, response time, ease of integration with other semiconductor devices, cost (overall system cost), and reliability. The potential for significant cost savings by integrating several safety functions into the initiator makes this technology worthy of attention by the safety system designer.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.13 no.4
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• pp.87-95
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• 1999

A primary limitation of the awlication of New class of solid state high power, high speed electronic device, narrely, the Photo-Conductive Power Switch(PCPS) is that the switches flashover at the surlace under average awlied fields much less than the bulk breakdown field of the semiconductor in most cases. The only way overcome those problffi1 and has a workable compact solid state switch is to passivate the surlace by a solid state dielectric material. In this experirrentation, The voltage withstands of Silicon is to be severely degraded when operated in vacuum(10[kV/cm]) and the perlormance is improved when operated in air(30[kV/cm[), in SF6(80~100[kV/cm]). After the passivation, the device had a breakdown field in vacuum and air at a field as high as the unpassivated device in SF6. A experirrent results show passivated devices have excellent breakdown field. In this paper, We improved the main properties and mechanism of the silicon breakdown before and after passivation under high field. field.

• Tribology and Lubricants
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• v.35 no.3
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• pp.176-182
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• 2019

The primary objective of this study is to treat a monocrystalline silicon (Si) wafer having a thickness of $279{\mu}m$ by employing the ultrasonic nanocrystal surface modification (UNSM) technology for improving the efficiency and service life of nano-electromechanical systems (NEMSs) and micro-electromechanical systems (MEMSs) by enhancing of wear and corrosion resistances. The wear and corrosion resistances of the Si wafer were systematically investigated before and after UNSM treatment, wherein abrasive, oxidative and spalling wear mechanisms were applied to the as-received and subsequently UNSM-treated Si wafer. Compared to the asreceived state, the wear and corrosion resistances of the UNSM-treated Si wafer are found to be enhanced by about 23% and 14%, respectively. The enhancement in wear and corrosion resistances after UNSM treatment may be attributed to grain size refinement (confirmed by Raman spectroscopy) and modified surface integrity. Furthermore, it is observed that the Raman intensity reduced significantly after UNSM treatment, whereas neither the Raman shift nor new phases were found on the surface of the UNSM-treated Si wafer. In addition, the friction coefficient values of the as-received and UNSM-treated Si wafers are found to be about 0.54 and 0.39, respectively. Hence, UNSM technology can be effectively incorporated as an alternative mechanical surface treatment for NEMSs and MEMSs comprising Si wafers.

• Journal of Korea Foundry Society
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• v.18 no.4
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• pp.349-356
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• 1998

In this study, the influence of impurity element Ca, P on solidification behavior and morphology of eutectic silicon was examined by observation of microstructure and by DSC analysis. In the case of 1.3 ppm P, eutectic Si was fine and fibrous when the added amount of Ca was 500 ppm, However, the modification of eutectic Si was depressed by formation of polygonal Ca-Si compounds when the addition amount of Ca was greater than 1000 ppm. The addition of Ca 500 ppm depressed the primary and eutectic temperature. The primary and eutectic temperature were depressed with Ca 500 ppm but rather ascended when the addition amount of Ca was more than 1000 ppm. When the content of P was 17.5 ppm, eutectic Si had modified morphology with Ca addition. DAS was increased, the primary temperature was ascended and eutectic temperature was depressed with Ca added. Eutectic Si appeared as coarse flake phase and DAS was decreased with the increase of P content. The existence of P in the melt depressed the primary temperature and ascended eutectic temperature.

• Progress in Superconductivity and Cryogenics
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• v.6 no.4
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• pp.37-40
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• 2004

A 1 MV A single phase high temperature superconducting (HTS) transformer was manufactured and tested. The rated voltages of primary and secondary of the HTS transformer are 22.9 kV and 6.6 kV respectively. BSCCO-2223 HTS tape was used for HTS windings of 1 MV A HTS transformer. In order to reduce AC loss generated in the HTS winding, the type of concentric arrangement winding was adopted to a 1 MV A HTS transformer. Single HTS tape for primary windings and 4 parallel HTS tapes for secondary windings were used considering the each rated current of the HTS transformer. A core of HTS transformer was fabricated as a shell type core made of laminated silicon steel plate. And a GFRP cryostat with a room temperature bore was also manufactured. The characteristic tests of 1 MV A HTS transformer were performed such as no load test, short circuit test and several insulation tests at 65 K using sub-cooled liquid nitrogen. From the results of tests, the validity of design of HTS transformer was ascertained.

• Transactions on Electrical and Electronic Materials
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• v.16 no.1
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• pp.37-41
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• 2015

The most common structure of the current transformer (CT) consists of a length of wire wrapped many times around a silicon steel ring passed over the circuit being measured. Therefore, the primary circuit of CT consists of a single turn of the conductor, with a secondary circuit of many tens or hundreds of turns. The primary winding may be a permanent part of the current transformer, with a heavy copper bar to carry the current through the magnetic core. However, when the large current flows into a wire, it is difficult to measure its magnitude of current because the core is saturated and the core shows magnetic nonlinear characteristics. Therefore, we proposed a newly designed CT which has an air gap in the core to decrease the generated magnetic flux. Adding the air gap in the magnetic path increases the total magnetic reluctance against the same magnetic motive force (MMF). Using a ferrite core instead of steel also causes the generation of low magnetic flux. These features can protect the magnetic saturation of the CT core compared with the steel core. This technique can help the design of the CT to obtain a special shape and size.

• Journal of Powder Materials
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• v.25 no.5
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• pp.395-401
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• 2018

The improvement of dispersion stability for the primary polishing slurry in a CMP process is achieved to prevent defects produced by agglomeration of the slurry. The dispersion properties are analyzed according to the physical characteristics of each silica sol sample. Further, the difference in the dispersion stability is confirmed as the surfactant content. The dispersibility results measured by Zeta potential suggest that the dispersion properties depend on the content and size of the abrasive in the primary polishing slurry. Moreover, the optimum ratio for high dispersion stability is confirmed as the addition content of the surfactant. Based on the aforementioned results, the long-term stability of each slurry is analyzed. Turbiscan analysis demonstrates that the agglomeration occurs depending on the increasing amount of surfactant. As a result, we demonstrate that the increased particle size and the decreased content of silica improve the dispersion stability and long-term stability.

• Resources Recycling
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• v.28 no.2
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• pp.3-13
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• 2019

Aluminum is the most abundant metal and the second most plentiful metallic element in the earth's crust, after silicon. Aluminum is a light, conductive, and corrosion resistant metal with strong affinity for oxygen. However, the primary aluminum production process is highly energy intensive. The recycling of aluminum scrap reduces the energy consumption and environmental burden, comparing to the primary metal production. However, the amount of the recovered metal from scrap is limited because of the difficulties to remove the impurities in the scrap. This work provides an overview of the aluminum production and recycling process, from the preparation of alumina to the scrap upgrading and the melting process.

• The Sea:JOURNAL OF THE KOREAN SOCIETY OF OCEANOGRAPHY
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• v.6 no.1
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• pp.40-48
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• 2001

The vertical distributions of temperature, salinity, dissolved oxygen, nutrients, chlorophyll, and primary production were investigated within the top 200m water depth in the south Pacific Ocean in February,2000. The study area ($24^{\circ}-41^{\circ}S,\;81^{\circ}-168^{\circ}W$) can be hydrologically divided into two regions. Upwelling was actively occurring in the eastern region of the $110^{\circ}S$ line, meanwhile it was not active in the western region. Accordingly, chemical properties in the surface waters were different between the two regions; nitrate+nitrite and phosphate concentrations were much higher in the eastern region than in the western region due to the active upwelling, but silicate concentration was higher in the western region. Among the nutrients, the major element influencing primary production was also different between the two regions; silicon would be a major element influencing primary production in the eastern region, but nitrogen may act as a major element for primary production in the western region. Primary production showed similar values in the two regions in spite of the large differences of nutrient concentrations in the surface waters, but the total chlorophyll integrated within the 200 m water depth was almost twice as much as in the western region than that in the eastern legion.

• Transactions on Electrical and Electronic Materials
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• v.16 no.6
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• pp.293-302
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• 2015

Degraded data stability, weaker write ability, and increased leakage power consumption are the primary concerns in scaled static random-access memory (SRAM) circuits. Two new SRAM cells are proposed in this paper for achieving enhanced read data stability and lower leakage power consumption in memory circuits. The bitline access transistors are asymmetrically gate-underlapped in the proposed SRAM cells. The strengths of the asymmetric bitline access transistors are weakened during read operations and enhanced during write operations, as the direction of current flow is reversed. With the proposed hybrid asymmetric SRAM cells, the read data stability is enhanced by up to 71.6% and leakage power consumption is suppressed up to 15.5%, while displaying similar write voltage margin and maintaining identical silicon area as compared to the conventional memory cells in a 15 nm FinFET technology.