• The Journal of the Acoustical Society of Korea
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• v.16 no.3
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• pp.57-63
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• 1997

This paper proposes a new stereophonic acoustic echo canceller to preven the performance degradation at the instant of far-end talker's movement or change in transmission room environment in stereophonic teleconferencing system. In stereophonic acoustic echo canceller, the filter coefficients of the adaptive filters for echo cancellation do not have unique solutions and not converge to their optimum values. Therefore, the change of the far-end transmission room environment leads to degradation of ERLE(Echo Return Loss Enhanceement). Moreover, their computational complexity increases as the number of the filter coefficient increases, and their adaptive filters converge very slowly. So the real-time implementation is very difficult. To overcome these problems we propose a pre-processor consisting of an adaptive filter for making pseudo stereophonic signal, and it results in improved performance at the instant of environment change at far-end side and reduction of the total complexity.

• The Journal of the Acoustical Society of Korea
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• v.31 no.1
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• pp.29-38
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• 2012

This paper presents a transient noise reduction system in a speech signal. The proposed transient noise reduction system utilizes a median filter to reduce the transient noise. Since the median filter can distort speech during the noise reduction, a long-term prediction (LTP) filter is adopted as a pre-processor to minimize speech distortion. The speech information preserved by the LTP filter is re-synthesized after reducing the noise. This paper verifies the weakness of a linear prediction (LP) filter and the superiority of the LTP filter for preserving the speech component in transient noise presence environment. Applying the proposed system, the signal-to-noise ratio (SNR) of output is improved by 8dB in both speech and noise presence region, and PESQ score is increased by 1 point comparing with noisy input.

• Progress in Medical Physics
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• v.3 no.1
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• pp.71-78
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• 1992

This study describes the design of the biophysiological signal processing analyzer which can collect and analyze the biosignal raw data. System hardware is consisted of the IBM PC AT. pre-amplifier. AID converter, Counter/Timer. and RS-232C processor. Biophysiological signal data were processed by the software digital filter. FFT and graphic processing routine. The tachogram and FFT of the the peak to peak interval time was accomplished by the Graphic user interface software using the biophysiological signal processed data. Using this system. the powerspectrum of the heart rate variability during the long term could be observed. Experimental results of this system approach our purpose. which is improved the cost performance. easy to use. reducing raw-data noise and optimizing model for digital filter.

• Journal of IKEEE
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• v.24 no.2
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• pp.559-569
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• 2020

One of the deep-running algorithms, CNN's artificial intelligence application uses off-chip memory to store data on the Convolution Layer. DMA can reduce processor load at every data transfer. It can also reduce application performance degradation by varying the order in which data from the Convolution layer is transmitted to the global buffer of the accelerator. For basic layouts with continuous memory addresses, SG-DMA showed about 3.4 times performance improvement in pre-setting DMA compared to using ordinaly DMA, and for Ideal layouts with discontinuous memory addresses, the ordinal DMA was about 1396 cycles faster than SG-DMA. Experiments have shown that a combination of memory data layout and DMA can reduce the DMA preset load by about 86 percent.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.5
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• pp.1-6
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• 2016

Image rotation is one of main pre-processing step in image processing or image pattern recognition. It is implemented with rotation matrix multiplication. However it requires lots of floating point arithmetic operations and trigonometric function calculations, so it takes long execution time. We propose a new high speed image rotation algorithm without two major time-consuming operations. It use just 2 shear translation operations, so it is very fast. In addition, we apply a parallel computing technique with CUDA. CUDA is a massively parallel computing architecture using prevailed GPU recently. As GPU is a dedicated graphic processor, it is exellent for parallel processing of pixels. We compare the proposed algorithm with the conventional rotation one with various size images. Experimental results show that the proposed algorithm is superior to the conventional rotation ones.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.36 no.8
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• pp.865-871
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• 2012

In this study, a wrapping program was developed to analyze a proportional solenoid valve more easily using a conventional finite element method (FEM) tool. To achieve an accurate solution when analyzing a solenoid valve, finite element analysis (FEA) is more suitable than a lumped method. To develop a program for modeling and analyzing the valve performance using FEA code for the user's convenience, it is assumed that the solenoid valve is composed of some simple geometries, namely, a triangle and a rectangle. This assumption helps users to model a solenoid valve simply. To check the feasibility of the developed code, an actual solenoid valve is analyzed, and it is found that the code can suitably analyze this valve. The characteristics of the proportional valve are well identified as indicated through the graphs.

• Journal of The Korean Society of Agricultural Engineers
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• v.52 no.3
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• pp.97-104
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• 2010

The purpose of this study is to evaluate sediment yield reduction under various field slope conditions with rice straw mat. The Vegetative Filter Strip Model-W (VFSMOD-W) and Soil and Water Assessment Tool (SWAT) were used for simulation of sediment yield reduction effect of rice straw mat. The Universe Soil Loss Equation Practice factor (USLE P factor), being able to reflect simulation of rice straw mat in the agricultural field, were estimated for each slope with VFSMOD-W and measured soil erosion values under 5, 10, and 20 % slopes. Then with the regression equation for slopes, USLE P factor was derived and used as input data for each Hydrological Response Unit (HRU) in the SWAT model. The SWAT Spatially Distributed-HRU (SD-HRU) pre-processor module was utilized, moreover, in order to consider spatial location and topographic features (measured topographic features by field survey) of all HRU within each subwatershed in the study watershed. Result of monthly sediment yield without rice straw mat (Jan. 2000 - Aug. 2007) was 814.72 ton/month, and with rice straw mat (Jan. 2000 - Aug. 2007) was 526.75 ton/month, which was reduced as 35.35 % compared without it. Also, during the rainy season (from Jun. to Sep. 2000 - 2007), when without vs. with rice straw mat, monthly sediment indicated 2,109.54 ton and 1,358.61 ton respectively. It showed about 35.60 % was reduced depending on rice straw mat. As shown in this study, if rice straw mat is used as a Best Management Practice (BMP) in the sloping fields, rainfall-driven sediment yield will be reduced effectively.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.30 no.6
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• pp.21-30
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• 2002

A preconditioned Navier-Stokes code was parallelized by the domain decomposition technique, and the accuracy of the parallelized code was verified through a comparison with the result of a sequential code and experimental data. Parallel performance of the code was examined on a Myrinet based PC-cluster and a Fast-Ethernet system. Speed-up ratio was examined as a major performance parameter depending on the number of processor and the network communication topology. In this test, Myrinet system shows a superior parallel performance to the Fast-Ethernet system as was expected. A test for the dependency on problem size also shows that network communication speed in a crucial factor for parallel performance, and the Myrinet based PC-cluster is a plausible candidate for high performance parallel computing system.

• Journal of Satellite, Information and Communications
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• v.9 no.4
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• pp.73-76
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• 2014

With the increasing popularity of multi-core processors, they have been adopted even in embedded systems. Under this circumstance many multimedia applications can be parallelized on multi-core platforms because they usually require heavy computations and extensive memory accesses. This paper proposes an efficient thread-level parallel implementation for color space conversion on multi-core CPU. Thread-level parallelism has been becoming very useful parallel processing paradigm especially on shared memory computing systems. In this work, it is exploited by allocating different input pixels to each thread for concurrent loop executions. For the performance evaluation, this paper evaluate the performace improvements for color conversion on multi-core processors based on the processing speed comparison between its serial implementation and parallel ones. The results shows that thread-level parallel implementations show the overall similar ratios of performance improvements regardless of different multi-cores.

• Journal of the Institute of Convergence Signal Processing
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• v.4 no.3
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• pp.49-54
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• 2003

In this paper, we propose a controller with the self-organizing neural network compensator for compensating PID controller's response. PID controller has simple design method but needs a lot of trials and errors to determine coefficients. A neural network control method does not have optimal structure as the parameters are pre-specified by designers. In this paper, to solve this problem, we use a self-organizing neural network which has Back Propagation Network algorithm using a Gaussian Potential Function as an activation function of hidden layer nodes for compensating PID controller's output. Self-Organizing Neural Network's learning is proceeded by Gaussian Function's Mean, Variance and number which are automatically adjusted. As the results of simulation through the second order plant, we confirmed that the proposed controller get a good response compare with a PID controller. And we implemented the of controller performance hydraulic servo motor system using the DSP processor. Then we observed an experimental results.