• 제목/요약/키워드: power-efficient design

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서비스 시스템에 따른 센서네트워크 MAC 알고리즘 (MAC Algorithm of Sensor Networks to Service System)

  • 박우출;;이상학;김대환;유준재
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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    • pp.225-227
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    • 2004
  • A sensor networkis composed of a large number of sensor nodes, which are densely deployed either inside the phenomenon or very close to it. One of the most important constraints on sensor nodes is the low power consumption requirement. Sensor nodes carry limited, generally irreplaceable, power sources. Therefore, while traditional networks aim to achieve high quality of service (QoS) provisions, sensor network protocols must focus primarily on power conservation. This paper presents the characteristics of energy consuming, average delay in 802.11 MAC, S-MAC that is specifically designed for wireless sensor networks. We analyze the energy consuming state in the 802.11 MAC in the simulation topology nodes, and measure average delay in 802.11 and S-MAC. Energy efficiency is the primary goal in this protocol design. 802.11 MAC is more efficient than S-MAC in the average delay, throughput. However S-MAC is an energy efficient protocol, a tradeoff between energy efficiency and delay.

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효율적인 인덱싱 기법을 이용한 3차원 물체 인식:Part I-Bayesian 인덱싱 (Three-dimensional object recognition using efficient indexing:Part I-bayesian indexing)

  • 이준호
    • 전자공학회논문지C
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    • 제34C권10호
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    • pp.67-75
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    • 1997
  • A design for a system to perform rapid recognition of three dimensional objects is presented, focusing on efficient indexing. In order to retrieve the best matched models without exploring all possible object matches, we have employed a bayesian framework. A decision-theoretic measure of the discriminatory power of a feature for a model object is defined in terms of posterior probability. Detectability of a featrue defined as a function of the feature itselt, viewpoint, sensor charcteristics, nd the feature detection algorithm(s) is also considered in the computation of discribminatory power. In order to speed up the indexing or selection of correct objects, we generate and verify the object hypotheses for rfeatures detected in a scene in the order of the discriminatory power of these features for model objects.

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모바일용 디지털 오디오 스피커를 위한 고효율 드라이버 설계 (A High-Efficiency Driver Design for Mobile Digital Audio Speakers)

  • 김용석;임민중
    • 전기학회논문지P
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    • 제60권1호
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    • pp.19-26
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    • 2011
  • In this paper, we designed Interpolation FIR(Finite Impulse Response) filter and 1-bit SDM(Sigma- Delta Modulator) for small digital audio speaker, which has low power consumption and high output characteristics. In order to achieve high linearity and low distortion performance of the systems, we adopt Type I Chevychev FIR filter which has equiripple characteristics in the pass band and proposed high efficient FIR filter structure. SDM is the most efficient modulation technique among the noise shaping techniques. In this paper, we implemented SDM using CIFB(Cascade of Intergrators, Feed-Back) which is generally used in DAC of small digital audio speakers. The proposed SDM structure can achieve high SNR, high-efficiency characteristics and low power consumption in mobile devices. Also considering manufacture of SoC(System on Chip), we performed simulation with Matlab and Verilog HDL to obtain optimal number of operational bits and verified a good experimental results.

EFFICIENT THERMAL MODELING IN DEVELOPMENT OF A SPACEBORNE ELECTRONIC EQUIPMENT

  • Kim Jung-Hoon;Koo Ja-Chun
    • 한국우주과학회:학술대회논문집(한국우주과학회보)
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    • 한국우주과학회 2004년도 한국우주과학회보 제13권2호
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    • pp.270-273
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    • 2004
  • The initial thermal analysis needs to be fast and efficient to reduce the feedback time for the optimal electronic equipment designing. In this study, a thermal model is developed by using power consumption measurement values of each functional breadboard, that is, semi-empirical power dissipation method. In modeling heat dissipated EEE parts, power dissipation is imposed evenly on the EEE part footprint area which is projected to the printed circuit board, and is called surface heat model. The application of these methods is performed in the development of a command and telemetry unit (CTU) for a geostationary satellite. Finally, the thermal cycling test is performed to verify the applied thermal analysis methods.

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Parametric Study of a Fixed-blade Runner in an Ultra-low-head Gate Turbine

  • Mohamed Murshid Shamsuddeen;Duc Anh Nguyen;Jin-Hyuk Kim
    • 신재생에너지
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    • 제20권1호
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    • pp.116-125
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    • 2024
  • Ultra-low-head is an unexplored classification among the sites in which hydroelectric power can be produced. This is typically owing to the low power output and the economic value of the turbines available in this segment. A turbine capable of operating in an ultra-low-head condition without the need of a dam to produce electricity is developed in this study. A gate structure installed at a shallow water channel acting as a weir generates artificial head for the turbine mounted on the gate to produce power. The turbine and generator are designed to be compact and submersible for an efficient and silent operation. The gate angle is adjustable to operate the turbine at varying flow rates. The turbine is designed and tested using computational fluid dynamics tools prior to manufacturing and experimental studies. A parametric study of the runner blade parameters is conducted to obtain the most efficient blade design with minimal hydraulic losses. These parameters include the runner stagger and runner leading edge flow angles. The selected runner design showed improved hydraulic characteristics of the turbine to operate in an ultra-low-head site with minimal losses.

저전력 소모와 테스트 용이성을 고려한 회로 설계 (A study on low power and design-for-testability technique of digital IC)

  • 이종원;손윤식;정정화;임인칠
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 하계종합학술대회논문집
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    • pp.875-878
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    • 1998
  • In this thesis, we present efficient techniques to reduce the switching activity in a CMOS combinational logic network based on local logic transforms. But this techniques is not appropriate in the view of testability because of deteriorating the random pattern testability of a circuit. This thesis proposes a circuit design method having two operation modes. For the sake of power dissipation(normal operation mode), a gate output switches as rarely as possible, implying highly skewed signal probabilities for 1 or 0. On the other hand, at test mode, signals have probabilities of being 1 or 0 approaching 0.5, so it is possible to exact both stuck-at faults on the wire. Therefore, the goals of synthesis for low power and random pattern testability are achieved. The hardware overhead sof proposed design method are only one primary input for mode selection and AND/OR gate for each redundant connection.

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민감부하 보상용 1 MJ 초전도 에너지저장 시스템 제작 및 시험 (Fabrication and Test of a 1 MJ Superconducting Energy Storage System for the Sensitive Load)

  • 성기철;유인근;한성룡;정희종
    • 한국초전도ㆍ저온공학회논문지
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    • 제3권2호
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    • pp.39-43
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    • 2001
  • For several decades researches and development on superconducting magnetic energy storage(SMES) system have been done for efficient electric power management. Korea Electrotechnology Research Institute (KERI) have developed of a 1MJ , 300kVA SMES System for improving power quality in sensitive electric loads. It consists of an IGBT (Insulated Gate Bipolar Transistor) based power conversion module. NbTi mixed matrix conductor superconducting magnet and a cryostat with HTS current leads. We developed the code fro design of a SMES magnet. Which could find the parameters of the SMES magnet having minimum amount of superconductors for the same store denerby. and designed the 1 MJ SMES magnet by using it . And we have design and fabricated cryostat with kA class HTS current leads for a 1 MJ SMES System. This paper describes the design fabrication and test results for a 1MJ SMES System.

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원자력 발전소 인간공학 프로그램 (Human factors engineering progrma in nuclear power plant)

  • 나정창;이호형
    • 대한인간공학회:학술대회논문집
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    • 대한인간공학회 1996년도 추계학술대회논문집
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    • pp.125-140
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    • 1996
  • Human Factors Engineering(HFE) program should be developed from the early stage of the design process for Nuclear Power Plant. The HFE program is conducted in accordance with the guidance in the Standard Review Plan(SRP) NUREG 0800, Chapter 18. The major purpose of this program is to reduce the incidence of human error during the operating life of the plants. A comprehensive human factors program is prepared by KOPEC to assure that key elements of human factors involvement are not inadvertently overlooked and the early, complete, and continuing inclusion of HFE in the design process. This paper is to introduce engineering steps of the HF activities to verify that the HF involvements on man-machine interface are adequate to support safe and efficient operation of nuclear power plant. If systems are developed without sufficient consideration on the HFE in the design, such systems may cost a high price due to the malfunction of the plant induced by the human errors.

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프란시스 수차의 설계조건 변동에 따른 수력학적 해석 (Analysis of Hydraulics Power according to Changable Design Conditions for Francis Turbines)

  • 최주석;김일수;문채주;김옥삼
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.690-692
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    • 2005
  • Among many other alternative energy resources, small scale hydropower has been brought into attention as a reliable source of energy today, which had been relatively neglected since 1960s. Present low head of Francis turbines and small scale hydro turbines, however, have limitations in the minimum required head and flow rate for efficient operation. This study attempts to develope the Francis turbine which is expected to run efficiently even in very low head and small flow rate, so that the limitations on the conventional small scale hydropower could be alleviated and competition with other alternative energy sources in the changable design conditions could be attained. The Francis turbine of a new concept was designed based on changable design conditions, hydrodynamics and theory of power transmission.

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전기 철도 터널 내 전력설비의 효율적 설계 및 구현 (An Efficient Electric Installation Design and Implementation for Electric Railway Tunnels)

  • 이규대;전정표;김광호
    • 산업기술연구
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    • 제31권B호
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    • pp.23-26
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    • 2011
  • The efficiency and performance of electric facilities in electric railway tunnels are quite important factors for operation and maintenance of railway since most of maintenance works for railways are doing during the night. Specially, in the railways like Gyeong-Chun Line passing through many mountains, many parts of railways are constructed with tunnels. So, this paper proposes the efficient electrical installation design scheme for railway tunnel considering the system performance, economics, and the reliability of power supply to tunnel electric facilities. Finally, the proposed design scheme is implemented to the tunnel design for Gyeong-Chun Line (Electric Railway).

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