• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.137-139
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• 2005

본 논문에서는 30W급 스위칭형 직류전원장치 (Switching Mode Power Supply : SMPS)에 준공진형 프라이 백 스위칭 레귤레이터(quasi-resonant flyback switching regulator)를 적용하여 방사노이즈(radiation-noise)를 억제한 사례에 대하여 설명하고 있다. 기존의 PI사(社)의 TOP IC 시리즈$^{[1]}$와 같이 보편적으로 사용되고 있는 일명, 하드 스위칭(hard-switching)형 레귤레이터를 사용할 경우, 고속 스위칭시에 스위칭 손실(switching loss)과 스위칭 노이즈(switching noise)가 발생한다. 이로 인하여 SMPS의 발열에 따른 효율저화와 방사 노이즈에 의한 전파방해 등이 문제점이 된다. 본 논문에서는 일본의 Sanken사(社)에서 개발/시판중인 준공진형 스위칭 레귤레이터인 STR-F6000 IC 시리즈$^{[2]}$를 이용하여 프라이백 SMPS를 구성하여 방사노이즈를 저감하였다.

• 전기전자학회논문지
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• 제21권3호
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• pp.264-267
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• 2017

본 논문에서는 잡음 제거 회로를 이용하여 공급 전원 제거 비를 향상시킨 LDO(Low drop-out) 레귤레이터를 제안하였다. LDO 레귤레이터 내부의 오차증폭기와 패스 트랜지스터 사이에 잡음 제거 회로를 두어 전압 라인에서 들어오는 노이즈에 패스 트랜지스터가 받는 영향을 줄일 수 있게 설계하였으며, 기존의 LDO 레귤레이터와 동일한 레귤레이션 특성을 갖도록 했다. 제안한 회로는 0.18um 공정을 사용하였고 Cadence의 Virtuoso, Spectre 시뮬레이터를 사용하였다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2004년도 ICCAS
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• pp.2051-2054
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• 2004

This paper proposes a more accurate task level energy measurement technique for high speed microprocessors. The technique is based on the relationship of the amount of current consumed by the microprocessor and the pulse width of the power supply controller chip, employed in the synchronous buck DC-DC converter in the microprocessor's power supply. The accuracy of the measurement is accomplished by measuring variation in pulse width in each power supply cycle. The major advantage of this technique is that its accuracy does not depend on the operating frequency of the microprocessor. To prove the proposed technique, we implemented the measurement unit of the microprocessor energy meter using an FPGA chip operating at 50 MHz. Both static and dynamic load measurement are tested in order to obtain some behaviours. Moreover, various commercially available mainboards which employ synchronous buck regulators at 200 KHz switching frequency, were measured. The results agree with previous works with better accuracy at higher operating frequency.

• Journal of information and communication convergence engineering
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• 제9권1호
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• pp.74-77
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• 2011

PSPICE modeling of a commercial LED driver IC (TOP245P) and PC817A optocoupler is proposed for the switch-mode power supply (SMPS) (applicable to LED driver) design and simulation. An analog behavioral model of the TOP245P IC including the shunt regulator, under-voltage(UV) detection, over-voltage(OV) shut-down and SR flip-flop is developed by using PSPICE. The empirical equation of PC817A current transfer ratio (CTR) is fitted from the datasheet of PC817A. Two types of SMPSs are simulated with the averaged-model and switching-model. The simulation results by the proposed PSPICE models are in good agreement with those in the data sheet and an experimental data.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.206-208
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• 1995

Recently according to the increasing critical loads such as communication and life support systems stable power supplying becomes more and more important. Therefore it is indespensable to stabilize power source using these instruments - AVR(Automatic Voltage Regulator) or UPS(Uninterrutible Power Supply). This paper deals with ON-LNE UPS which is composed of PWM converter for AC-DC conversion. Using a PWM converter have advantages of low current harmonics and high power factor. In this paper ON-LNE UPS using PWM converter is proposed and its characteristics are investigated.

• 전력전자학회논문지
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• 제12권6호
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• pp.433-440
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• 2007

에너지 절약과 환경 문제가 이슈화되면서 대표적인 전원공급장치인 SMPS의 대기모드 효율이 중요시되고 있다. 특히 많은 SMPS들이 다출력 구조로 설계됨에 따라 대기모드에서 전력손실을 줄이기가 쉽지 않다. 본 논문에서는 SSPR(Secondary Side Post Regulator)을 개발하여 단일 컨버터에서 Cross Regulation과 대기전력을 함께 해결하였다. 그리고, 다중 컨버터의 대기전력 감소를 위하여 전류모드 제어와 Power Sequence 제어기술을 제안한다. 제안된 기술은 이론적 해석과 더불어 120[W], 270[W]급 SMPS에 적용하여 그 타당성 및 우수성을 검증하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.1123-1125
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• 2002

In this paper, interleaved boost converter is applied as a pre-regulator in switch mode power supply. Interleaved Boost Power Factor Preregulator (IBPFP) can reduce input current ripple as a simple voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. IBPFP can be classified as three cases from duty ratio condition in continuous current mode and be carried out state space averaging small signal modeling. According to modeling, the PID controller is applied and voltage control loop is constructed for suitable design condition. From frequency domain analysis, it is verified that control system is satisfied with design condition of switch mode power supply.

• 전기학회논문지P
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• 제60권3호
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• pp.126-132
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• 2011

A conventional LDO(Low Dropout Regulator) uses one OPAMP and one signal path. This means that OPAMP's DC Gain and Bandwidth can't optimize simultaneously within usable power. This also appears that regulation property and settling time of LDO can't improve at the same time. Based on this idea, a proposed LDO uses two OPAMP and has two signal path. To improve regulation property, OPAMP where is used in the path which qualities DC gain on a large scale, bandwidth designed narrowly. To improve settling time, OPAMP where is used in the path which qualities DC gain small, bandwidth designed widely. A designed LDO used 0.5um 1P2M process and provided 200mA of output current. A line regulation and load regulation is 12.6mV/V, 0.25mV/mA, respectively. And measured settling time is 1.5us in 5V supply voltage.

• 전기학회논문지P
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• 제56권4호
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• pp.173-178
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• 2007

As development of industry is accelerated, most electricity load system requires power supply that could be high precision and effective control. Among supply and control unit of suitable power supply in these load characteristic, inverter systems of constant current regulate is used widely control of lighting & beaconing of aerodromes and electric heating system. Therefore, in this paper proposed a inverter systems of constant current regulate that using improved measurement and switching techniques. Proposed measure techniques that used moving average method of instantaneous r.m.s. for measuring current sensing improved response and precision. Also, in this paper proposed improved high effectiveness switching techniques that get high efficiency of inverter by the double-carrier modulation. Results of an experiment proved effect of proposed system.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.528-533
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• 2016

A low voltage high PSRR CMOS Bandgap circuit capable of generating a stable voltage of less than 1 V (0.8 V and 0.5 V) robust to Process, Voltage and Temperature (PVT) variations is proposed. The high PSRR of the circuit is guaranteed by a low-voltage current mode regulator at the central aspect of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage $V_{reg}$ for the BG core and Op-Amp rather than the VDD. These current mirrors reduce the impact of supply voltage variations. The proposed circuit is implemented in a $0.35{\mu}m$ CMOS technology. The BGR circuit occupies $0.024mm^2$ of the die area and consumes $200{\mu}W$ from a 5 V supply voltage at room temperature. Experimental results demonstrate that the PSRR of the voltage reference achieved -118 dB at frequencies up to 1 kHz and -55 dB at 1 MHz without additional circuits for the curvature compensation. A temperature coefficient of $60 ppm/^{\circ}C$ is obtained in the range of -40 to $120^{\circ}C$.