• Title/Summary/Keyword: polymer gate dielectric

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Low-voltage Pentacene Field-Effect Transistors Based on P(S-r-BCB-r-MMA) Gate Dielectrics (P(S-r-BCB-r-MMA) 게이트 절연체를 이용한 저전압 구동용 펜타센 유기박막트랜지스터)

  • Koo, Song Hee;Russell, Thomas P.;Hawker, Craig J.;Ryu, Du Yeol;Lee, Hwa Sung;Cho, Jeong Ho
    • Applied Chemistry for Engineering
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    • v.22 no.5
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    • pp.551-554
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    • 2011
  • One of the key issues in the research of organic field-effect transistors (OFETs) is the low-voltage operation. To address this issue, we synthesized poly(styrene-r-benzocyclobutene-r-methyl methacrylate) (P(S-r-BCB-r-MMA)) as a thermally cross-linkable gate dielectrics. The P(S-r-BCB-r-MMA) showed high quality dielectric properties due to the negligible volume change during the cross-linking. The pentacene FETs based on the 34 nm-thick P(S-r-BCB-r-MMA) gate dielectrics operate below 5 V. The P(S-r-BCB-r-MMA) gate dielectrics yielded high device performance, i.e. a field-effect mobility of $0.25cm^2/Vs$, a threshold voltage of -2 V, an sub-threshold slope of 400 mV/decade, and an on/off current ratio of ${\sim}10^5$. The thermally cross-linkable P(S-r-BCB-r-MMA) will provide an attractive candidate for solution-processable gate dielectrics for low-voltage OFETs.

Investigation on the P3HT-based Organic Thin Film Transistors (P3HT를 이용한 유기 박막 트랜지스터에 관한 연구)

  • Kim, Y.H.;Park, S.K.;Han, J.I.;Moon, D.G.;Kim, W.G.;Lee, C.J.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.04b
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    • pp.45-48
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    • 2002
  • Poly(3-hexylthiophene) or P3HT based organic thin film transistor (OTFT) array was fabricated on flexible poly carbonate substrates and the electrical characteristics were investigated. As the gate dielectric, a dual layer structure of polyimide-$SiO_2$ was used to improve the roughness of $SiO_2$ surface and further enhancing the device performance and also source-drain electrodes were $O_2$ plasma treated for improvement of the electrical properties, such as drain current and field effect mobility. For the active layer, polymer semiconductor, P3HT layer was printed by contact-printing and spin-coating method. The electrical properties of OTFT devices printed by both methods were evaluated for the comparison. Based on the experiments, P3HT-based OTFT array with field effect mobility of 0.02~0.025 $cm^{2}/V{\cdot}s$ and current modulation (or $I_{on}/I_{off}$ ratio) of $10^{3}\sim10^{4}$ was fabricated.

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A Printing Process for Source/Drain Electrodes of OTFT Array by using Surface Energy Difference of PVP (Poly 4-vinylphenol) Gate Dielectric (PVP(Poly 4-vinylphenol) 게이트 유전체의 표면에너지 차이를 이용한 유기박막트랜지스터 어레이의 소스/드레인 전극 인쇄공정)

  • Choi, Jae-Cheol;Song, Chung-Kun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.3
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    • pp.7-11
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    • 2011
  • In this paper, we proposed a simple and high-yield printing process for source and drain electrodes of organic thin film transistor (OTFT). The surface energy of PVP (poly 4-vinylphenol) gate dielectric was decreased from 56 $mJ/m^2$ to 45 $mJ/m^2$ by adding fluoride of 3000ppm into it. Meanwhile the surface energy of source and drain (S/D) electrodes area on the PVP was increased to 87 $mJ/m^2$ by treating the areas, which was patterned by photolithography, with oxygen plasma, maximizing the surface energy difference from the other areas. A conductive polymer, G-PEDOT:PSS, was deposited on the S/D electrode areas by brushing painting process. With such a simple process we could obtain a high yield of above 90 % in $16{\times}16$ arrays of OTFTs. The performance of OTFTs with the fluoride-added PVP was similar to that of OTFTs with the ordinary PVP without fluoride, generating the mobility of 0.1 $cm^2/V.sec$, which was sufficient enough to drive electrophoretic display (EPD) sheet. The EPD panel employing the OTFT-backpane successfully demonstrated to display some patterns on it.

Study on the Low-temperature process of zinc oxide thin-film transistors with $SiN_x$/Polymer bilayer gate dielectrics ($SiN_x$/고분자 이중층 게이트 유전체를 가진 Zinc 산화물 박막 트랜지스터의 저온 공정에 관한 연구)

  • Lee, Ho-Won;Yang, Jin-Woo;Hyung, Gun-Woo;Park, Jae-Hoon;Koo, Ja-Ryong;Cho, Eou-Sik;Kwon, Sang-Jik;Kim, Woo-Young;Kim, Young-Kwan
    • Journal of the Korean Applied Science and Technology
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    • v.27 no.2
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    • pp.137-143
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    • 2010
  • Oxide semiconductors Thin-film transistors are an exemplified one owing to its excellent ambient stability and optical transparency. In particular zinc oxide (ZnO) has been reported because It has stability in air, a high electron mobility, transparency and low light sensitivity, compared to any other materials. For this reasons, ZnO TFTs have been studied actively. Furthermore, we expected that would be satisfy the demands of flexible display in new generation. In order to do that, ZnO TFTs must be fabricated that flexible substrate can sustain operating temperature. So, In this paper we have studied low-temperature process of zinc oxide(ZnO) thin-film transistors (TFTs) based on silicon nitride ($SiN_x$)/cross-linked poly-vinylphenol (C-PVP) as gate dielectric. TFTs based on oxide fabricated by Low-temperature process were similar to electrical characteristics in comparison to conventional TFTs. These results were in comparison to device with $SiN_x$/low-temperature C-PVP or $SiN_x$/conventional C-PVP. The ZnO TFTs fabricated by low-temperature process exhibited a field-effect mobility of $0.205\;cm^2/Vs$, a thresholdvoltage of 13.56 V and an on/off ratio of $5.73{\times}10^6$. As a result, We applied experimental for flexible PET substrate and showed that can be used to ZnO TFTs for flexible application.