• Transactions of Materials Processing
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• v.13 no.3
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• pp.248-252
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• 2004

The mechanical properties of polycrystalline thin-films, critical for Micro-Electro-Mechanical Systems (MEMS) components, are known to have the size effect and the scatter in the length scale of microns by the numbers of intensive investigation by experiments and simulations. So, the consideration of the microstructure is essential to cover these length scale effects. The lattice based stochastic model for the microstructure evolution is used to simulate the actual microstructure, and the fast and reliable algorithm is described in this paper. The kinetics parameters, which are the key parameters for the microstructure evolution based on the nucleation and growth mechanism, are extracted from the given micrograph of a polycrystalline material by an inverse method. And the method is verified by the comparison of the quantitative measures, the number of grains and the grain size distribution, for the actual and simulated microstructures. Finite element mesh is then generated on this lattice based microstructure by the developed code. And the statistical finite element analysis is accomplished for selected microstructure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.275-275
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• 2008

This paper describe the fabrication of a Pd/polycrystalline 3C-SiC schottky diode and its characteristics, in which the polycrystalline 3C-SiC layer and Pd Schottky contact were deposited by using APCVD and sputter, respectively. Crystalline quality, uniformity, and preferred orientations of the Pd thin film were evaluated by SEM and XRD, respectively. Pd/poly 3C-SiC Schottky diodes were fabricated and characterized by I-V and C-V measurements. Its electric current density Js and barrier height voltage were measured as $2\times10^{-3}$ A/$cm^2$ and 0.58 eV, respectively. These devices were operated until about $400^{\circ}C$. Therefore, from these results, Pd/poly 3C-SiC Schottky devices have very high potential for high temperature chemical sensor applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.92-92
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• 2008

The surface flatness of heteroepitaxially grown 3C-SiC thin films is a key factor affecting electronic and mechanical device applications. This paper describes the surface flatness of polycrystalline 3C-SiC thin films by the gas flow control according to the location change of geometric structure. The polycrystalline 3C-SiC thin film was deposited by APCVD(Atmospheric pressure chemical vapor deposition) at $1200^{\circ}C$ using HMDS(Hexamethyildisilane : $Si_2(CH_3)_6)$ as single precursor, and 5 slm Ar as the main flow gas. According to the location of geometric structure, surface fringes and flatness changed. It shows the distribution of thickness is formed uniformly in the specific location of the geometric structure.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.145-148
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• 2001

In this paper, polycrystalline silicon thin film transistor using by Solid Phase Crystallization(SPC) were fabricated, and these devices were measured and analyzed the electrical output and transfer characteristics along to DC voltage stress. The transfer characteristics of polycrystalline silicon thin film transistor depended on drain and gate voltages. Threshold voltage is high with long channel length and narrow channel width. And output characteristics of polycrystalline silicon thin film transistor flowed abruptly much higher drain current. The devices induced electrical stress are decreased drain current. At last, field effect mobility is the faster as channel length is high and channel width is narrow.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.12 no.3
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• pp.161-164
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• 2002

Polycrystalline and epitaxial heterostructure films of $La_{0.5}Sr_{0.5}CoO_{3}/Pb(Nb_{0.04}Zr_{0.28}Ti_{0.68})O_{3}/La_{0.5}Sr_{0.5}CoO_{3}$ (LSCO/PNZT/LSCO) capacitors were evaluated in terms of low voltage and high speed operation in high density memory, using TiN/Pt conducting barrier combination. Structural studies for a high density ferroelectric memory process flow, which requires the integration of conducting barrier layers to connect the drain of the pass-gate transistor to the bottom electrode of the ferroelectric stack, indicate complete phase purity (i.e. fully perovskite) in both epitaxial and polycrystalline materials. The polycrystalline capacitors show lower remnant polarization and coercive voltages. However, the retention, and high-speed characteristics are similar, indicating minimal influence of crystalline quality on the ferroelectric properties.

• Journal of Sensor Science and Technology
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• v.5 no.1
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• pp.71-77
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• 1996

Considering that polycrystalline silicon, a structural material of the micromachining, is affected by a sacrificial oxide layer, the poly-oxide obtained by the thermal oxidation of polycrystalline silicon is newly proposed and estimated as the sacrificial oxide layer. The grain size of the polycrystalline silicon grown on the poly-oxide is larger than that of poly crystalline silicon grown on the conventional sacrificial oxide layer. As a result of XRD, increase of (111) textures and formation of additional (220) textures are observed on the polycrystaIline silicon deposited on the poly-oxide. Also, the polycrystalline silicon grown on the poly-oxide represents small and uniform stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.69-70
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• 2008

Micro resonators have been actively investigated for bio/chemical sensors and RF M/NEMS devices. Among various materials, SiC is a very promising material for micro/nano resonators since the ratio of its Young's modulus, E, to mass density, $\rho$, is significantly higher than other semiconductor materials, such as, Si and GaAs. Polycrystalline 3C-SiC cantilever with different lengths were fabricated using a surface micromachining technique. Polycrystalline 3C-SiC micro resonators were actuated by piezoelectric element and its fundamental resonance was measured by a laser vibrometer in air and vacuum at room temperature, respectively. For the cantilever with $100{\mu}m$ length, $10{\mu}m$width and $1.3{\mu}m$ thickness, the fundamental frequency appeared at 147.2 kHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.408-409
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• 2006

The polycrystalline 3C-SiC thin films heteroepitaxially grown by LPCVD method using single precursor 1. 3-disilabutane at $850^{\circ}C$. The crystallinity of the 3C-SiC thin film. was analyzed by XPS. Residual strain was investigated by Raman scattering. The surface morphology and voids between SiC and $SiO_2$ were measured by SEM. The grown poly 3C-SiC thin film is very good crystalline quality, surface like mirror, and low defect and strain. Therefore, the polycrystalline 3C-SiC is suitable for harsh environment MEMS applications.

• 한국초전도학회:학술대회논문집
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• v.14
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• pp.39-39
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• 2004

• Journal of the Korean Ceramic Society
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• v.32 no.7
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• pp.761-768
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• 1995

Double layered BaTiO3 thin films with high dielectric constant as well as good insulating property were prepared for the application to low voltage driving thin film electroluminescent (TFEL) device. BaTiO3 thin films were formed by rf-magnetron sputtering technique. Amorphous and polycrystalline BaTiO3 thin films were deposited at the substrate temperatures of room temperature and 55$0^{\circ}C$, respectively. Two kinds of films prepared under these conditions showed high resistivity and high dielectric constant. The figure of merit (=$\varepsilon$r$\times$Eb.d) of polycrystalline BaTiO3 thin film was very high (8.43$\mu$C/$\textrm{cm}^2$). The polycrystalline BaTiO3 showed a substantial amount of leakage current (I), under the high electric field above 0.5 MV/cm. The double layered BaTiO3 thin film, i.e., amorphous BaTiO3 layer coated polycrystalline BaTiO3 thin film, was prepared by the new stacking method and showed very good dielectric and insulating properties. It showed a high dielectric constant fo 95 and leakage current density of 25 nA/$\textrm{cm}^2$ (0.3MV/cm) with the figure of merit of 20$\mu$C/$\textrm{cm}^2$. The leakage current density in the double layered BaTiO3 was much smaller than that in polycrystalline BaTiO3 under the high electric field. The saturated brightness of the devices using double layered BaTiO3 was about 220cd/$m^2$. Threshold voltage of TFEL devices fabricated on double layered BaTiO3 decreased by 50V compared to the EL devices fabricated on amorphous BaTiO3.