• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2015.11a
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• pp.180-181
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• 2015

본 논문에서는 ICP Poly Etcher를 이용한 Dry Etch에서 몇가지 공정조건의 변화에 따른 Etching 특성 변화를 연구하였다. 주요 가스유량들이 증가 할 때, Poly-Si 의 Etch rate는 증가 하였으며 Uniformity는 나빠진 것을 확인 할 수 있었고 다른 특성들은 특별한 변화를 보이지 않았다. 주요 Gas인 HBr의 증가는 PR(Photo Resist)와 Uniformity에 영향을 주었다. 이 논문을 통해 HBr의 유량이 Poly-Si Etching에 영향을 주는 결과를 알아 볼 수 있었고 HBr 가스의 유량 증가가 Polymer의 생성에 영향을 줘 Selectivity와 Uniformity를 증가 시킨다는 것도 확인 해 볼 수 있었다.

• Electrical & Electronic Materials
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• v.11 no.11
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• pp.22-27
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• 1998

We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.623-627
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• 1999

We report a new in-situ fluorine passivation method without in implantation by employing excimer laser annealing of $SiO_{x}F_{y}$/a-Si structure and its effects on p-channel poly-Si TFTs. The proposed method doesn't require any additional annealing step and is a low temperature process because fluorine passivation is simultaneous with excimer-laser-induced crystallization. A in-situ fluorine passivation by the proposed method was verified form XPS analysis and conductivity measurement. From experimental results, it has been shown that the proposed method is effective to improve the electrical characteristics, specially field-effect mobility, and the electrical stability of p-channel poly-Si TFTs. The improvement id due to fluorine passivation, which reduces the trap state density and forms the strong Si-F bonds in poly-Si channel and $SiO_2/poly-Si$ interface. From these results, the high performance poly-Si TFTs canbe obtained by employing the excimer-laser-induced fluorine passivation method.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.6
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• pp.46-53
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• 1998

A new method to form the double structured active layers of a-Si/a-SiN$_{x}$ of polycrystalline thin film transistor is proposed and poly-Si TFTs employed double structure active film are fabricated. Nitrogen ions were added to bottom amorphous silicon active film(a-SiN$_{x}$ ) and pure a-Si film deposition on a-SiN$_{x}$ was followed. The XeCl excimer laser was irradiated to crystallize double structure active film. The grain growth of upper a-Si film was also promoted in the double structured active layers of a-Si/a-SiN$_{x}$ due to the mitigation of solidification process of lower a-SiN$_{x}$ layer. Our experimental results show that the ratio of NH$_3$/SiH$_4$ is required to maintain below 0.11 for the reduction of contact resistance of n$^{+}$ poly-SiN$_{x}$ layer.r.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.202-205
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• 2002

Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently future high-resolution, high-performance flat panel display technology However, it was very difficult to fabricate high performance poly-Si TFTs at a temperature lower than 300$^{\circ}C$ for glass substrate. Conventional process on a glass substrate were limited temperature less than 600$^{\circ}C$ This paper proposes a high temperature process above 750$^{\circ}C$ using a flexible molybdenum substrate deposited hydrogenated amorphous silicon (a-Si:H) and than crystallized a rapid thermal processor (RTP) at the various temperatures from 750$^{\circ}C$ to 1050$^{\circ}C$. The high temperature annealed poly-Si film illustrated field effect mobility higher than 30 $\textrm{cm}^2$/Vs, achieved I$\sub$on//I$\sub$off/ current ratio of 10$^4$ and crystall volume fraction of 92%. In this paper, we introduce the new TFTs Process as flexible substrate very promising roll-to-roll process, and exhibit the properties of high temperature crystallized poly-Si Tn on molybdenum substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.80-81
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• 2008

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1582-1584
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• 1996

The polycrystalline silicon thin film transistors (poly-Si TFT) are the most promising candidate for active matrix liquid crystal displays (AMLCD) for their high mobilities and current driving capabilities. The leakage current of the poly-Si TFT is much higher than that of the amorphous-Si TFT, thus larger storage capacitance is required which reduces the aperture ratio fur the pixel. The offset gated poly-Si TFTs have been widely investigated in order to reduce the leakage current. The conventional method for fabricating an offset device may require additional mask and photolithography process step, which is inapplicable for self-aligned source/drain ion implantation and rather cost inefficient. Due to mis-alignment, offset devices show asymmetric transfer characteristics as the source and drain are switched. We have proposed and fabricated a new offset poly-Si TFT by applying photoresist reflow process. The new method does not require an additional mask step and self-aligned ion implantation is applied, thus precise offset length can be defined and source/drain symmetric transfer characteristics are achieved.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.75-76
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• 2007

Poly-Si Schottky barrier Thin Film Transistor (SB-TFT) is manufactured with erbium silicided source/drain. High quality poly-Si film was obtained by crystallizing the amorphous Si film with Excimer laser annealing (ELA) method. The fabricated poly-Si SB-TFT devices showed low leakage current and large on/off current ratio. Moreover, the electrical characteristics were considerably improved by 3% $H_2/N_2$ gas annealing, which is attributed to the reduction of trap states at the grain boundaries and interface trap states at gate oxide/poly-si channel.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1633-1635
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• 1997

For AMLCD pixel switching device, poly-Si TFT has the advantage of high field effect mobility over a-Si TFT. However, it also has some disadvantage such as large leakage current and more masking steps. We propose a new Inverse Staggered poly-Si TFT with a-Si offset. We have fabricated the new device and verified high ON/OFF current ratio. The device has lower leakage current level than the conventional Inverse Staggered poly-Si TFT and the same number of masking steps compared with conventional a-Si TFT's.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.179-182
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• 2007

Polycrystaline (poly) 3C-SiC thin film on n-type and p-type Si were deposited by APCVD using HMDS, $H_2$, and Ar gas at $1180^{\circ}C$ for 3 hour. And then the schottky diode with Au/poly 3C-Sic/Si(n-type) structure was fabricated. Its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) value were measured as 0.84 V, over 140 V, 61nm, and $2.7{\times}10^{19}\;cm^3$, respectively. The p-n junction diode fabricated by poly 3C-SiC was obtained like characteristics of single 3C-SiC p-n junction diode. Therefore, its poly 3C-SiC thin films are suitable MEMS applications in conjuction with Si fabrication technology.