• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.46-52
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• 2009

A Multi-Core/Multi-Thread architecture is adopted for the Shader processor to enhance the processing performance. The Shader processor is designed to utilize its processing core IP for multiple purposes, such as Vertex-Shading, Rasterization, Pixel-Shading, etc. In this paper, we propose a 'Rasterization based on Vector Algorithm' that makes parallel pixels processing possible with Multi-Core and Multi-Thread architecture on the Shader Core. The proposed algorithm takes only 2% operation counts of the Scan-Line Algorithm and processes pixels independently.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.11
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• pp.853-858
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• 2006

In this paper, we propose a practical method for hardware-accelerated rendering of the depth image-based representation(DIBR) of 3D graphic object using graphic processing unit(GPU). The proposed method overcomes the drawbacks of the conventional rendering, i.e. it is slow since it is hardly assisted by graphics hardware and surface lighting is static. Utilizing the new features of modem GPU and programmable shader support, we develop an efficient hardware-accelerating rendering algorithm of depth image-based 3D object. Surface rendering in response of varying illumination is performed inside the vertex shader while adaptive point splatting is performed inside the fragment shader. Experimental results show that the rendering speed increases considerably compared with the software-based rendering and the conventional OpenGL-based rendering method.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.4
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• pp.119-128
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• 2019

Due to the nature of the 3D graphics processor system, many mathematical calculations are required and parallel processing research using GPU (Graphics Processing Unit) is being performed for high-speed processing. In this paper, we propose a 3D graphics processor using MAMS, a parallel processor that does not use cache memory, to solve the GPU problem of increasing bandwidth caused by cache memory miss and the problem that 3D shader processing speed is not constant. The 3D graphics processor using MAMS proposed in this paper designed Vertex shader, Pixel shader, Tiling and Rasterizing structure using DirectX command analysis, the FPGA(Xilinx Virtex6@100MHz) board for MAMS was constructed and designed using Verilog. We compared the processing time of the developed FPGA (100Mhz) and nVidia GeForce GTX 660 (980Mhz), the processing time using GTX 660 was not constant and suing MAMS was constant.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.85-95
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• 2008

Characteristically, 3D graphic algorithms have to perform complex calculations on massive amount of stream data. The vertex and pixel shaders have enabled efficient execution of graphic algorithms by hardware, and these graphic processors may seem to have achieved the aim of "hardwarization of software shaders." However, the hardware shaders have hitherto been evolving within the limits of Z-buffer based algorithms. We predict that the ultimate model for future graphic processors will be an algorithm-independent integrated shader which combines the functions of both vertex and pixel shaders. We design the register file model that supports 3-dimensional computer graphic on the programmable unified shader processor. we have verified the accurate calculated value using FPGA Virtex-4(xcvlx200) made by Xilinx for operating binary files made by the implementation progress based on synthesis results.

• 한국HCI학회:학술대회논문집
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• 2007.02c
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• pp.318-321
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• 2007

This paper proposes a GPU-based approach to real-time skinning animation of large crowds, where each character is animated independently of the others. In the first pass of the proposed approach, skinning is done by a pixel shader and the transformed vertex data are written into the render target texture. With the transformed vertices, the second pass renders the large crowds. The proposed approach is attractive for real-time applications such as video games.

• 한국HCI학회:학술대회논문집
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• 2009.02a
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• pp.459-462
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• 2009

Hatching is an effective artistic tool for conveying shape and shading by placing parallel line strokes on drawing objects. We present a simple and effective per-pixel image-space hatching method to draw line strokes using given stroke directions. Our hatching method directly runs on the screen and it can efficiently render highly complex scenes in hatching styles. We implement the algorithm using a pixel shader in a modern GPU.

• 한국HCI학회:학술대회논문집
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• 2006.02a
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• pp.455-462
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• 2006

본 논문에서는 저가의 보급형 프로젝터를 사용하고 Programmable GPU 기법중 Pixel Shader 기술을 이용하여 에지블렌딩을 수행하였으며, $7{\times}4$ 개의 프로젝터로 구성된 $6592{\times}2784$ 픽셀의 초고해상도를 가지는 $5.6m{\times}2.4m$ 의 대형 타일드 디스플레이를 구축해 보았다. 또한 타일드 디스플레이용 응용프로그램으로서 타일드 디스플레이 시스템을 마치 하나의 컴퓨터처럼 작동시킬 수 있는 타일드 디스플레이 관리 프로그램을 개발했으며, 이 프로그램은 컴퓨터와 프로젝터 제어, 응용프로그램 실행 및 종료를 담당한다. 그 외에도 일반 컴퓨터에서는 실행이 불가능한 초고해상도의 이미지 및 동영상까지도 볼 수 있는 이미지 뷰어와 동영상 플레이어를 개발하였다. 또한 100 만 폴리곤 이상의 3D 모델을 실시간으로 인터렉션 할 수 있는 3D 뷰어 등을 개발 하였다.

• Journal of Korea Game Society
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• v.7 no.1
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• pp.31-42
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• 2007

In the natural world, most materials such as skin, marble and cloth are translucent. Their appearance is smooth and soft compared with metals or mirrors. In this paper, we propose a new GPU based hierarchical rendering technique for translucent materials, based on the dipole diffusion approximation, at interactive rates. Information of incident light, position, normal, and irradiance, on the surfaces are stored into 2D textures by rendering from a primary light view. Huge numbers of pixel photons are clustered into quad-tree image pyramids. Each pixel, we select clusters (sets of photons), and then we approximate multiple subsurface scattering term with the clusters. We also introduce a novel hierarchical screen-space interpolation technique by exploiting spatial coherence with early-z culling on the GPU. We also build image pyramids of the screen using mipmap and pixel shader. Each pixel of the pyramids is stores position, normal and spatial similarity of children pixels. If a pixel's the similarity is high, we render the pixel and interpolate the pixel to multiple pixels. Result images show that our method can interactively render deformable translucent objects by approximating hundreds of thousand photons with only hundreds clusters without any preprocessing. We use an image-space approach for entire process on the GPU, thus our method is less dependent to scene complexity.

• Journal of the Korea Computer Graphics Society
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• v.17 no.4
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• pp.31-40
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• 2011

Projector-based visual systems are widely used for VR and experience display applications. But the illumination irregularity on the screen surface due to the screen material and its light reflection properties sometimes deteriorates the user experience. This phenomenon is particularly troublesome when the participants of the head tracking VR system such as CAVE or the motion generation experience system continually move around the system. One of reason to illumination irregularity is projector-screen specular reflection component to participant's eye's position and it's analysis needs high computation complexity. Similar to calculate specular lighting term using GPU's programmable shader, Our research adjusts every pixel's brightness in runtime with given 3D screen space model to reduce illumination irregularity. For doing that, Angle-based brightness compensate function are considered for specific screen installation and modified it for GPU-friendly compute and access. Two aspects are implemented, One is function access transformation from angular form to product and the other is piecewise linear interpolate approximation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.9
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• pp.2023-2030
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• 2010

In this paper, we present research results of developing high performance scan conversion unit and implementing it on FPGA chip. To increase performance of scan conversion unit, we propose an architecture of scan converter that is a SIMD architecture and uses tile-based traversing method. The proposed scan conversion unit can operate about 124Mhz clock frequency on Xilinx Vertex4 LX100 device. To verify the scan conversion unit, we also develop shader unit, texture mapping unit and $240{\times}320$ color TFT-LCD controller to display outputs of the scan conversion unit on TFT-LCD. Because the scan conversion unit implemented on FPGA has 311Mpixels/sec pixel rate, it is applicable to desktop pc's 3d graphics system as well as mobile 3d graphics system needing high pixel rates.