• Journal of Sensor Science and Technology
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• v.28 no.2
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• pp.71-75
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• 2019

This paper proposes the extension of the dynamic range in complementary metal oxide semiconductor (CMOS) image sensors (CIS) using switching operation of in-pixel inverter. A CMOS inverter is integrated in each unit pixel of the proposed CIS for switching operations. The n+/p-substrate photodiode junction capacitances are added to each unit pixel. When the output voltage of the photodiode is less than half of the power supply voltage of the CMOS inverter, the output voltage of the CMOS inverter changes from 0 V to the power supply voltage. Hence, the output voltage of the CMOS inverter is adjusted by changing the supply voltage of the CMOS inverter. Thus, the switching point is adjusted according to light intensity when the supply voltage of the CMOS inverter changes. Switching operations are then performed because the CMOS inverter is integrated with in each unit pixel. The proposed CIS is composed of a pixel array, multiplexers, shift registers, and biasing circuits. The size of the proposed pixel is $10{\mu}m{\times}10{\mu}m$. The number of pixels is $150(H){\times}220(V)$. The proposed CIS was fabricated using a $0.18{\mu}m$ 1-poly 6-metal CMOS standard process and its characteristics were experimentally analyzed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.571-574
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• 2008

In this paper, we propose $256{\times}256$ pixel array fingerprint sensor with an advanced circuits for detecting. The pixel level simple detection circuit converts from a small and variable sensing current to binary voltage out effectively. We minimizes an electrostatic discharge(ESD) influence by applying an effective isolation structure. The sensor circuit blocks were designed and simulated in standard CMOS $0.35{\mu}m$ process. Full custom layout is performed in the unit sensor pixel and auto placement and routing is performed in the full chip.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.11
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• pp.24-32
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• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM(or SRAM) cell. Layout pitch of one-bit-wide logic is identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1)simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering, like smoothing and segmentation, may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1244-1247
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• 2004

For obtaining the best panel quality of color filter on array(COA) architecture in TFF LCD, we investigated the influence of deposition temperature, $O_2$ flow, thickness on the optical transmittance, wet etching and adhesion properties of IZO deposited onto each color photo resist(red, green, blue). Average transmittance of the pixel single layer in the visible range(between 380 and 780nm) was mainly affected by thickness and showed maximum at 1250 ${\AA}$ while the thickness showing peak transparency in each R, G, B wavelength was different. The relation was calculated by using bi-layer transmission and reflectance model, which corresponded to experimental data very well. The adhesion of IZO deposited on each color PR was found to have enhanced value except red PR case, compared to that of IZO which was deposited on $SiN_x$. Wet etching pattern linearity was decreased as the thickness increased. The thickness of IZO was one of vital factors in order to optimize overall pixel process for fabricating COA structure.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.9
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• pp.2071-2077
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• 2010

Interface modules design between image sensor and external components are designed by FPGA (Field Programmable Gate Array) in this paper. Generally speaking, to satisfy synchronization for the poor quality data in image, SRAM is needed. To receive synchronization signal and image signal data with pixel dimension, the proposed interface logic technique is implemented. From the proposed technique, we can obtain more clear screen by implementing with pixel dimension. Operating frequency of image sensor and that of TFT-LCD are 50MHz and 6.5MHz, respectively. Most of control logic functions are embedded in FPGA. The designed logic gate counter has 33,216 and is designed by Quartus II.

• Progress in Medical Physics
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• v.6 no.1
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• pp.65-77
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• 1995

A new gamma camera using a-Si : H photodetectors has been designed for the imaging of heart and other small organs. In this new design the photomultiplier tubes and the position sensing circuitry are replaced by 2-D array of a-Si : H p-i-n pixel photode tectors and readout circuitry which are built on a substrate. Without the photomultiplier tubes this camera is light weight, hence can be made portable. To predict the characteristics and the performance of this new gamma camera we did Monte Carlo simulations. In the simulations 128${\times}$128 imaging array of various pixel sixes were used. $\^$99m/Tc(140keV)and $\^$201/Tl(70keV) were used as radiation sources. From the simulations we could obtain the resolution of the camera and ther overall system, and the blurring effects due to scattering in the phantom. Using the Wiener filter for image processing, restoration of the blurred image could be achieved. Simulation results of a-Si : H based gamma camera were compared with those of a conwentional gamma camera.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.73-74
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• 2000

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking[1-3]. To improve these problems which are caused by the feed-through voltage, we have evaluated new driving methods to reduce the feed-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. These gate driving methods offer better feed-through characteristics than conventional simple gate pulse. Optimized step signal will compensate by step pulse time and voltage. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

• Proceedings of the KSRS Conference
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• v.2
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• pp.800-803
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• 2006

The Space-borne electro-optical camera system, like KOMPSAT has panchromatic redundant image channel as well as primary channel in order to increase reliability of satellite system. In most case redundant channel never been used during the whole mission period. Staggered array configuration using redundant image channel and new operation mode proposed which operates primary and redundant channel simultaneously. Without new hardware design, fast electronics and system complexity, we can get 1.414 times more fine GSD image of original system and aliasing effect which corrupt high frequency information of image can be minimized. To get the more efficiency from staggered array configuration, we introduce masked pixel CCD.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.662-664
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• 1999

We fabricated AC-TFEL device having cone-shaped Si micro-tip reflector array based on the process which have been conventionally employed for the Si-tip field emitter array in FED system. As a result, the AC-TFEL device having a new geometrical structure could generate well concentrated visible white-light from 3600 reflectors/pixel under bipolar pulse excitation mode only by edge-emission mechanism.

• Journal of the Optical Society of Korea
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• v.13 no.1
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• pp.139-145
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• 2009

Computational integral imaging (CII) is a new method for 3D imaging and visualization. However, it suffers from seriously poor image quality of the reconstructed image as the reconstructed image plane increases. In this paper, to overcome this problem, we propose a CII method based on a smart pixel mapping (SPM) technique for partially occluded 3D object recognition, in which the object to be recognized is located at far distance from the lenslet array. In the SPM-based CII, the use of SPM moves a far 3D object toward the near lenslet array and then improves the image quality of the reconstructed image. To show the usefulness of the proposed method, we carry out some experiments for occluded objects and present the experimental results.