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http://dx.doi.org/10.6109/jkiice.2010.14.9.2071

Design of Interface Module for Driving of Image Processing Using FPGA  

Jung, Sung-Hyuck (한백전자)
Kim, Jung-Tae (목원대학교)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.14, no.9, 2010 , pp. 2071-2077 More about this Journal
Abstract
Interface modules design between image sensor and external components are designed by FPGA (Field Programmable Gate Array) in this paper. Generally speaking, to satisfy synchronization for the poor quality data in image, SRAM is needed. To receive synchronization signal and image signal data with pixel dimension, the proposed interface logic technique is implemented. From the proposed technique, we can obtain more clear screen by implementing with pixel dimension. Operating frequency of image sensor and that of TFT-LCD are 50MHz and 6.5MHz, respectively. Most of control logic functions are embedded in FPGA. The designed logic gate counter has 33,216 and is designed by Quartus II.
Keywords
Image signal; Image sensor; FPGA matching;
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