• Title/Summary/Keyword: pipeline system

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Design and Implementation of Human-Detecting Radar System for Indoor Security Applications (실내 보안 응용을 위한 사람 감지 레이다 시스템의 설계 및 구현)

  • Jang, Daeho;Kim, Hyeon;Jung, Yunho
    • Journal of IKEEE
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    • v.24 no.3
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    • pp.783-790
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    • 2020
  • In this paper, the human detecting radar system for indoor security applications is proposed, and its FPGA-based implementation results are presented. In order to minimize the complexity and memory requirements of the computation, the top half of the spectrogram was used to extract features, excluding the feature extraction techniques that require complex computation, feature extraction techniques were proposed considering classification performance and complexity. In addition, memory requirements were minimized by designing a pipeline structure without storing the entire spectrogram. Experiments on human, dog and robot cleaners were conducted for classification, and 96.2% accuracy performance was confirmed. The proposed system was implemented using Verilog-HDL, and we confirmed that a low-area design using 1140 logics and 6.5 Kb of memory was possible.

DEEP-South: Automated Scheduler and Data Pipeline

  • Yim, Hong-Suh;Kim, Myung-Jin;Roh, Dong-Goo;Park, Jintae;Moon, Hong-Kyu;Choi, Young-Jun;Bae, Young-Ho;Lee, Hee-Jae;Oh, Young-Seok
    • The Bulletin of The Korean Astronomical Society
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    • v.41 no.1
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    • pp.54.3-55
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    • 2016
  • DEEP-South Scheduling and Data reduction System (DS SDS) consists of two separate software subsystems: Headquarters (HQ) at Korea Astronomy and Space Science Institute (KASI), and SDS Data Reduction (DR) at Korea Institute of Science and Technology Information (KISTI). HQ runs the DS Scheduling System (DSS), DS database (DB), and Control and Monitoring (C&M) designed to monitor and manage overall SDS actions. DR hosts the Moving Object Detection Program (MODP), Asteroid Spin Analysis Package (ASAP) and Data Reduction Control & Monitor (DRCM). MODP and ASAP conduct data analysis while DRCM checks if they are working properly. The functions of SDS is three-fold: (1) DSS plans schedules for three KMTNet stations, (2) DR performs data analysis, and (3) C&M checks whether DSS and DR function properly. DSS prepares a list of targets, aids users in deciding observation priority, calculates exposure time, schedules nightly runs, and archives data using Database Management System (DBMS). MODP is designed to discover moving objects on CCD images, while ASAP performs photometry and reconstructs their lightcurves. Based on ASAP lightcurve analysis and/or MODP astrometry, DSS schedules follow-up runs to be conducted with a part of, or three KMTNet telescopes.

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DEEP-South: Round-the-Clock Physical Characterization and Survey of Small Solar System Bodies in the Southern Sky

  • Moon, Hong-Kyu;Kim, Myung-Jin;Roh, Dong-Goo;Park, Jintae;Yim, Hong-Suh;Choi, Young-Jun;Bae, Young-Ho;Lee, Hee-Jae;Oh, Young-Seok
    • The Bulletin of The Korean Astronomical Society
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    • v.41 no.1
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    • pp.54.2-54.2
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    • 2016
  • Korea Microlensing Telescope Network (KMTNet) is the first optical survey system of its kind in a way that three KMTNet observatories are longitudinally well-separated, and thus have the benefit of 24-hour continuous monitoring of the southern sky. The wide-field and round-the-clock operation capabilities of this network facility are ideal for survey and the physical characterization of small Solar System bodies. We obtain their orbits, absolute magnitudes (H), three dimensional shape models, spin periods and spin states, activity levels based on the time-series broadband photometry. Their approximate surface mineralogy is also identified using colors and band slopes. The automated observation scheduler, the data pipeline, the dedicated computing facility, related research activity and the team members are collectively called 'DEEP-South' (DEep Ecliptic Patrol of Southern sky). DEEP-South observation is being made during the off-season for exoplanet search, yet part of the telescope time is shared in the period between when the Galactic bulge rises early in the morning and sets early in the evening. We present here the observation mode, strategy, software, test runs, early results, and the future plan of DEEP-South.

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A Study on the Design Value Analysis Model Using Probabilistic LCC Analysis of Water Supply System Project (확률적 LCC분석기법을 활용한 수도시설물의 설계VA모델에 관한 연구)

  • Jung Pyung-Ki;Seo Jong-Won;Lim Jong-Kwon
    • Korean Journal of Construction Engineering and Management
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    • v.5 no.2 s.18
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    • pp.181-193
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    • 2004
  • A life cycle cost analysis model for public water supply systems should be different from the ones for other civil and architectural facilities as the operation and the maintenance cost of the water supply systems mainly come from the various mechanical systems and the pipeline systems of the collecting/treating/distributing facilities. This paper presents a cost classification scheme and a probabilistic life cycle cost analysis (PLCCA) model for public water supply systems. A value analysis (VA) procedure that is well suited for practical purposes is also presented. The presented probabilistic life cycle model and the value analysis procedure were applied to a real world project, and this case study is discussed in the paper. The model and the procedure presented in this study can greatly contribute to the value-oriented design alternative selection, the estimation of the maintenance cost, and the allocation of budget for water supply system construction projects.

KBUD: The Korea Brain UniGene Database

  • Jeon, Yeo-Jin;Oh, Jung-Hwa;Yang, Jin-Ok;Kim, Nam-Soon
    • Genomics & Informatics
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    • v.3 no.3
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    • pp.86-93
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    • 2005
  • Human brain EST data provide important clues for our understanding of the molecular biology associated with the function of the normal brain and the molecular pathophysiology with brain disorders. To systematically and efficiently study the function and disorders of the human brain, 45,773 human brain ESTs were collected from 27 human brain cDNA libraries, which were constructed from normal brains and brain disorders such as brain tumors, Parkinson's disease (PO) and epilepsy. An analysis of 45,773 human brain ESTs using our EST analysis pipeline resulted in 38,396 high-quality ESTs and 35,906 ESTs, which were coalesced into 8,246 unique gene clusters, showing a significant similarity to known genes in the human RefSeq, human mRNAs and UniGene database. In addition, among 8,246 gene clusters, 4,287 genes ($52\%$) were found to contain full-length cONA clones. To facilitate the extraction of useful information in collected these human brain ESTs, we developed a user-friendly interface system, the Korea Brain Unigene Database (KBUD). The KBUD web interface allows access to our human brain data through three major search modes, the BioCarta pathway, keywords and BLAST searches. Each result when viewed in KBUD offers comprehensive information concerning the analyzed human brain ESTs provided by our data as well as data linked to various other publiC databases. The user-friendly developed KBUD, the first world-wide web interface for human brain EST data with ESTs of human brain disorders as well as normal brains, will be a helpful system for developing a better understanding of the underlying mechanisms of the normal brain well as brain disorders. The KBUD system is freely accessible at http://kugi.kribb.re.kr/KU/cgi -bin/brain. pI.

frequency Domain processor nor ADSL G.LITE Modem (ADSL G.LITE모뎀을 위한 주파수 영역 프로세서의 설계)

  • 고우석;기준석;고태호;윤대희
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12C
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    • pp.233-239
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    • 2001
  • Among the operations in frequency domain for ADSL G.LITE Modem to perform, FFT and FEQ are most computation-intensive part, of which many researches have been focused on the efficient implementation. Previous papers suggested hardwares suitable for ADSL G.DMT system, which is not feasible for simple G.LITE system. The analysis of frequency domain operations and computational efficiency according to the allocation of hardware resources is performed in this paper. The suggested processor has the structure of one real multiplier and two real adders connected in parallel, which can perform the operations efficiently through the pipeline- and/or parallel-type job scheduling. The suggested processor uses less hardware resources than Kiss\`s ALU structure or FFT/IFFT processor suggested by Wang, so the suggested one is more suitable for G.LITE system than previous works.

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A Visual Effect Retrieval System Design for Communication in Film-production - Focused on the Effect Using Computer Graphics Technology - (영화 비주얼 이펙트 제작의 커뮤니케이션을 위한 자료검색 시스템 제안 - 컴퓨터 그래픽 기술을 이용한 이펙트를 중심으로 -)

  • Jo, Kook-Jung;Suk, Hae-Jung
    • The Journal of the Korea Contents Association
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    • v.9 no.6
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    • pp.92-103
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    • 2009
  • With the help of computer graphics technologies, the visual effects techniques using these technologies replaced most of special effects techniques which had been used for early films. For these changes, directors and visual effects creators make an effect in a scene through their mutual agreement in contemporary films. However, they undergo a lot of trial-and-error while making a visual effects scene because they cannot perfectly communicate their ideas due to the director's narrative language, and also because of the visual effect creator's language of computer graphics technology. This research suggests the design of a visual effects data retrieval system for efficient communication between directors and visual effects creators. This application provides the means to search a database analyzing visual effects scenes extracted from 14 remarkable movies in visual effect history by narrative and visual effects technique. They can search visual effects scenes using this application. also, this data can foster communication with directors and creators so they can make an efficient production pipeline.

Numerical and experimental investigation on the global performance of a novel design of a Low Motion FPSO

  • Peng, Cheng;Mansour, Alaa M.;Wu, Chunfa;Zuccolo, Ricardo;Ji, Chunqun;Greiner, Bill;Sung, Hong Gun
    • Ocean Systems Engineering
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    • v.8 no.4
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    • pp.427-439
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    • 2018
  • Floating Production Storage and Offloading (FPSO) units have the advantages of their ability to provide storage and offloading capabilities which are not available in other types of floating production systems. In addition, FPSOs also provide a large deck area and substantial topsides payload capacity. They are in use in a variety of water depths and environments around the world. It is a good solution for offshore oil and gas development in fields where there is lack of an export pipeline system to shore. However due to their inherently high motions in waves, they are limited in the types of risers they can host. The Low Motion FPSO (LM-FPSO) is a novel design that is developed to maintain the advantages of the conventional FPSOs while offering significantly lower motion responses. The LM-FPSO design generally consists of a box-shape hull with large storage capacity, a free-hanging solid ballast tank (SBT) located certain distance below the hull keel, a few groups of tendons arranged to connect the SBT to the hull, a mooring system for station keeping, and a riser system. The addition of SBT to the floater results in a significant increase in heave, roll and pitch natural periods, mainly through the mass and added mass of the SBT, which significantly reduces motions in the wave frequency range. Model tests were performed at the Korea Research Institute of Ships & Ocean Engineering (KRISO) in the fall of 2016. An analytical model of the basin model (MOM) was created in Orcaflex and calibrated against the basin-model. Good agreement is achieved between global performance results from MOM's predictions and basin model measurements. The model test measurements have further verified the superior motion response of LM-FPSO. In this paper, numerical results are presented to demonstrate the comparison and correlation of the MOM results with model test measurements. The verification of the superior motion response through model test measurements is also presented in this paper.

Using the Deep Learning for the System Architecture of Image Prediction (엔터프라이즈 환경의 딥 러닝을 활용한 이미지 예측 시스템 아키텍처)

  • Cheon, Eun Young;Choi, Sung-Ja
    • Journal of Digital Convergence
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    • v.17 no.10
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    • pp.259-264
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    • 2019
  • This paper proposes an image prediction system architecture for deep running in enterprise environment. Easily transform into an artificial intelligence platform for an enterprise environment, and allow sufficient deep-running services to be developed and modified even in Java-centric architectures to improve the shortcomings of Java-centric enterprise development because artificial intelligence platforms are concentrated in the pipeline. In addition, based on the proposed environment, we propose a more accurate prediction system in the deep running architecture environment that has been previously learned through image forecasting experiments. Experiments show 95.23% accuracy in the image example provided for deep running to be performed, and the proposed model shows 96.54% accuracy compared to other similar models.

Optimized DES Core Implementation for Commercial FPGA Cluster System (상용 FPGA 클러스터 시스템 기반의 최적화된 DES 코어 설계)

  • Jung, Eun-Gu;Park, Il-Hwan
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.2
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    • pp.131-138
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    • 2011
  • The previous FPGA cluster systems for a brute force search of DES keyspace have showed cost efficient performance, but the research on optimized implementation of the DES algorithm on a single FPGA has been insufficient. In this paper, the optimized DES implementation for a single FPGA of the commercial FPGA cluster system with 77 Xilinx Virtex5-LX50 FPGAs is proposed. Design space exploration using the number of pipeline stages in a DES core, the number of DES cores and the maximum clock frequency of a DES core is performed which leads to integrating 16 DES cores running at 333MHz. Also low power design is applied to reduce the loss of performance caused by limitation of power supply on each FPGA which results in fitting 8 DES cores running at 333MHz. When the proposed DES implementations would be used in the FPGA cluster system, it is estimated that the DES key would be found at most 2.03 days and 4.06 days respectively.