• Journal of Institute of Control, Robotics and Systems
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• v.2 no.1
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• pp.35-44
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• 1996

A design method for a teleoperator robot system is presented in this paper. The control system consists of two phases; approach phase and contact one. The end-effector position of the estimated slave robot and the contact force between the end-effector and wall are displayed on the monitors at control site, using which the operator controls the teleoperator system. The approach phase controller is designed using Smith's principle and the contact one designed based upon the structured singular value ${\mu}$ in order to increase the robustness of the system. The uncertainatices such as communication time delay and the variations of system parameters are considered as a muliplicative pertubation. Computer simulations are conducted in order to evaluate the performance of the proposed design method. It is found that desirable control performance, especially in the contact phase, is obtained if the control mode is switched into contact phase when the estimated position of the slave robot end-effector is in front of the wall.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1376-1385
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• 2000

The phase characteristic of delay line in feedfarward linearizer has been changed due to variation of operating temperature. In this paper, design method of fixed phase control circuit of group delay line using adaptive vector control is derived. To maintain transfer characteristics of nominal operating temperature, the error correlated signals, which are changed adaptively due to changing of temperature, are added to main signals. The proposed method maintains transfer characteristics under 0.06dB of insertion loss and 0.36$^{\circ}$ of phase variation in case of 1-tone(880 MHz) and under 0.07 dB of insertion loss and 0.35$^{\circ}$ of phase variation in case of 2-tones(877 MHz, 882 MHz) for 10dB input power dynamic range and +/-10$^{\circ}$ phase variation respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.4
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• pp.683-690
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• 2018

In this paper, a new signal processing technique is proposed for calibrating gain, phase, delay offsets in array antenna based anti-jamming minimum variance distortionless response (MVDR) global-positioning-system (GPS) receivers. The proposed technique estimates gain, phase and delay offsets across the antennas, and compensates for the offsets based on the estimates. A pilot signal with good correlation characteristics is used for accurate estimation of the gain, phase and delay offsets. Based on the cross-correlation, the delay offset is first estimated and then gain/phase offsets are estimated. For fine delay offset estimation and compensation, an interpolation technique is used, and specifically, the discrete Fourier transform (DFT) is employed for the interpolation technique to reduce the computational complexity. The proposed technique is verified through computer simulation using MATLAB. According to the simulation results, the proposed technique can reduce the gain, phaes and delay offset to 0.01 dB, 0.05 degree, and 0.5 ns, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.72-78
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• 2009

This paper proposes a low phase noise ring voltage controlled oscillator(VCO) with a standard $0.13{\mu}m$ CMOS process for PLL circuit using the VCO-gain-controlled Delay cell. The proposed Delay cell architecture with a active resistor using a MOS transistor. This method can reduced a VCO gain so that improve phase noise. And, Delay cell consist of Wide-Swing Cascode current mirror, Positive Latch and Symmetric load for low phase noise. The measurement results demonstrate that the phase noise is -119dBc/Hz at 1MHz offset from 1.9GHz. The VCO gain and power dissipation are 440MHz/V and 9mW, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.3 s.345
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• pp.126-134
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• 2006

Traditional TCP implementations have the under-utilization problem in large bandwidth delay product networks especially during the startup phase. In this paper, we propose a delay-based congestion control(DCC) mechanism to solve the problem. DCC is subdivided into linear and exponential growth phases. When there is no queueing delay, the congestion window grows exponentially during the congestion avoidance period. Otherwise, it maintains linear increase of congestion window similar to the legacy TCP congestion avoidance algorithm. The exponential increase phase such as the slow-start period in the legacy TCP can cause serious performance degradation by packet losses in case the buffer size is insufficient for the bandwidth-delay product, even though there is sufficient bandwidth. Thus, the DCC uses the RTT(Round Trip Time) status and the estimated queue size to prevent packet losses due to excessive transmission during the exponential growth phase. The simulation results show that the DCC algorithm significantly improves the TCP startup time and the throughput performance of TCP in large bandwidth delay product networks.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.828-833
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• 2018

It is well known that reflected waves and resonance affect phase distortion. In addition, phase delay can be distorted by antenna impedance. In this study, we analyze the phase delay variation caused by the antenna impedance, considering mutual coupling effects. In addition, we confirm the beam steering characteristics. When was -10 dB and -7 dB, the maximum phase delay error was $18.5^{\circ}$ and $26.5^{\circ}$, respectively. The Monte Carlo simulation with an eight-element linear array antenna demonstrated that the RMS error of the beam steering angle ranged from $0.19^{\circ}$ to $0.4^{\circ}$, and the standard deviation ranged from $0.14^{\circ}$ to $0.33^{\circ}$ when the beam steering angle was in the range of $0^{\circ}$ to $30^{\circ}$, with the uniformly distributed phase error of $18.5^{\circ}$ and $26.5^{\circ}$. The side lobe level increased from 0.74 dB to 1.21 dB by the phase error from the theoretical value of -12.8 dB, with a standard deviation of 0.31 dB to 0.51 dB. This is verified by designing an eight-element spiral array antenna.

• ETRI Journal
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• v.35 no.5
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• pp.935-938
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• 2013

This letter presents an algorithm for selecting a low delay for the modified discrete cosine transform (MDCT) and inverse MDCT (IMDCT). The implementation of conventional MDCT and IMDCT requires a 50% overlap-add (OLA) for a perfect reconstruction. In the OLA process, an algorithmic delay in the frame length is employed. A reduced overlap window and MDCT/IMDCT phase shifting is used to reduce the algorithmic delay. The performance of the proposed algorithm is evaluated by applying the low-delay MDCT to the G.729.1 speech codec.

• Proceedings of the KIEE Conference
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• 2005.04a
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• pp.149-151
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• 2005

This paper deals with the novel control algorithm of single-phase hybrid active power filter for the compensation of harmonic current components in nonlinear R-L load with passive active power filters. To construct two-axes coordinate, an imaginary second phase was made by giving time delay to line current. In this proposed method, the new signal, which was the delayed through the filtering by the phase-delay property of low-pass filter, is used as the secondary phase. Because two phases have different phase, instantaneous calculation of harmonic current is possible. In this paper, a reference voltage is created by multiplying gain of filter by compensation current using the rotating reference frames that synchronizes with source-frequency, not applying to instantaneous reactive power theory which has been used with the existing fixed reference frames. This paper shows the experimental results, which provide a high accuracy and extremely fast response of single-phase hybrid active Bower filter under the operation with the proposed control method.

• Journal of Multimedia Information System
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• v.5 no.2
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• pp.139-142
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• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.