• Proceedings of the KIEE Conference
• /
• 1999.07f
• /
• pp.2682-2684
• /
• 1999

This paper presents design and stability analysis of the constant frequency Flyback type converter using average current-mode control. The average current-mode control has been recently reported, and superior characteristics over a peak current-mode control such as a good tracking performance of an average current, no slope compensation and noise immunity. By the improvement of PM(Phase Margin) obt from applying the compensator in the current loop, the stability of designed flyback convert more improved. The validity of designed convert confirmed by simulation and experimental result

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.4
• /
• pp.67-74
• /
• 2004

As data rate was increased, the conventional burst-mode automatic power control circuit caused errors due to the effort of the mark density variation. To solve this problem we invented a new structured peak-comparator which could eliminate the effect of the mark density variation even in high date rate, and revised the conventional one using it. We proposed a burst-mode automatic power control circuit robust to mark density variations. We found that the peak-comparator in the proposed automatic power control circuit was very robust to mark density variations because it affected very little by the mark density variation in high date rate and in the wide variation range of the reference current and the difference current.

• Proceedings of the KIPE Conference
• /
• 2005.07a
• /
• pp.257-260
• /
• 2005

Three different current-mode control schemes, peak current-mode control, charge control, and average current-mode control, are investigated for applications to asymmetrical half-bridge dc-to-dc converters. The principles, implementation, and performance of the three control schemes are compared in an attempt to identify the irrespective merits and limitations. Design examples for feedback compensations are given for the three control schemes. A 50 W experimental asymmetrical half-bridge dc-to-dc converter was used to experimentally verify the theoretical results of the paper.

• Proceedings of the KIEE Conference
• /
• summer
• /
• pp.1151-1153
• /
• 2004

In this paper, small-signal modeling and closed-loop performance of charge control employed to an asymmetrical half-bridge (ASHB) dc-to-dc converters are investigated. The charge control is selected as an alternative to the conventional voltage-mode control and peak current-mode (PCM) control, which have their respective limitations and problems when adapted to ASHB dc-to-dc converters. The current-loop dynamics of the charge control are presented in comparison with those of voltage-mode and PCM control. This paper demonstrates that the charge control offers better dynamic performance compared to voltage-mode control and superior noise characteristics compared to PCM control. The potential problem of charge control are also addressed.

• Proceedings of the KIPE Conference
• /
• 2003.07a
• /
• pp.337-340
• /
• 2003

This paper presented practical details about control-loop design and dynamic analysis for a peak current-mode controlled asymmetrical half-bridge(ASHB) do-to-dc converter, Graphical loop gain method is used to design the feedback compensation and analyze the closed-loop performance of ASHB converter. The results of the control design and closed-loop analysis are validated by experiments on a prototype converter.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.22 no.12
• /
• pp.157-163
• /
• 2008

In the multi-phase interleaved converter with peak current mode control, current imbalance is measured when inductors of converter module are not exactly identical. In this paper current-sharing controller is proposed to balance phase current of converter modules. It also is designed to have good transient response. Proposed method implemented the 2-phase and 4-phase interleaved boost converter with imbalanced inductance. Experimental results verify the performance of Current share during the transient state of converter.

• Journal of Power Electronics
• /
• v.17 no.2
• /
• pp.315-322
• /
• 2017

LED is a promising new generation of green lighting with the advantages of high efficiency, good optical performance, long lifetime and environmental friendliness. A pulsating current can be used to drive LEDs. However, current with a high peak-to-average ratio is unfavorable for LEDs. A novel control scheme for the ac-dc critical conduction mode (CRM) flyback LED driver is proposed in this paper. By using the input voltage, output voltage and average output current to control the turn-on time of the switch, the peak-to-average ratio of the output current can be reduced. The operation principle is analyzed and an implementation circuit is put forward. Experimental results show the effectiveness of the proposed scheme.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.24 no.3
• /
• pp.207-214
• /
• 2019

In this study, discrete-time domain analysis is proposed to investigate the input current of a buck AC/DC light-emitting diode (LED) driver. The buck power factor correction converter can operate in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). Two discontinuous and two continuous conduction operating modes are possible depending on which event terminates the conduction of the main switch in a switching cycle. All four operating modes are considered in the discrete-time domain analysis. The peak current-mode control with slope compensation is used to design a low-cost AC/DC LED driver. A slope compensation design of the buck AC/DC LED driver is described on the basis of a discrete-time domain analysis. Experimental results are presented to confirm the usefulness of the proposed analysis.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.65 no.4
• /
• pp.586-592
• /
• 2016

The current control of Continuous Conduction Mode(CCM) can be implemented by several methods: peak current control; average current control; and hysteresis control. Among these methods, the hysteresis current control is popularly applied in various converter applications because of its simplicity of implementation, fast current control response and inherent peak current limiting capability. However, a current controller with conventional hysteresis band which multiplies the current reference has the disadvantage that the modulation frequency varies in one cycle of the input voltage and, as a result, generates high switching frequency in the low input voltage section. Also it is complicated to design the input filter due to varying switching frequency. This paper proposed an optimum hysteresis-band current control method where the band is generated by using both multiplication method and sum method to maintain the modulation frequency to be nearly constant. This approach can solve the high switching frequency in the low input voltage section, and achieve easy design of input filter. The performance of the proposed converter is verified with the simulation and the experimental works.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.11 s.353
• /
• pp.98-104
• /
• 2006

The conventional burst-mode APC(Automatic Power Control) circuit had an effective structure that was suitable for a low power consumption and a monolithic chip. However, as data rate was increased, it caused errors due to the effect of the zero density. In this paper, we invented a new structured peak-comparator which could compensate the unbalance of the injected currents using double gated MOS and MOS diode. And we proposed a new burst-mode APC adopting it. The new peak-comparator in the proposed APC was very robust to zero density variations maintaining the correct decision point of the current comparison at high data rate. It was also suitable for a low power consumption and a monolithic chip due to lack of large capacitors.