• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.1
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• pp.93-101
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• 2010

Currently lots of studies to solve meta-data interoperability in between schema attributes are conducted. But the accuracy in previous schema mapping studies is low since the studies just use the similarity in between attributes. So the studies are not suitable for the schema mapping such as document conversion, system integration, etc. In this paper, we propose a method which can conduct the schema mapping interactively using frequent pattern mining. The method can conduct more accurate mapping process because the method use the description element which is an element among each schema element for the metadata standard. A performance study has been conducted to compare the accuracy performance of the method using metadata standards.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.5
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• pp.15-24
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• 2009

This paper proposes an effective low power BIST architecture using the pattern mapping method for 100% fault coverage and the transition freezing method for making high correlative low power patterns. When frozen patterns are applied to a circuit, it begins to find a great number of faults at first. However, patterns have limitations of achieving 100% fault coverage due to random pattern resistant faults. In this paper, those faults are covered by the pattern mapping method using the patterns generated by an ATPG and the useless patterns among frozen patterns. Throughout the scheme, we have reduced an amount of applied patterns and test time compared with the transition freezing method, which leads to low power dissipation.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.5_6
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• pp.213-222
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• 2003

Most existing algorithms adopt the forward mapping method that is based on vector representation. Problem of existing algorithms Is the exponential increase of memory usage with number of layers. This degrades the accuracy of the boundary pattern representation. Our method uses bitmap representation and does not require any additional post-processing for conversion of vector-form results to bitmap-form. A new and efficient algorithm is presented in this paper for the generation of hyperbolic patterns by means of backward mapping methods.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.787-790
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• 1998

In this paper, we presents a method for multi-level logic mainmization which is suitable for the minimization of look-up table type FPGAs. A pattern extraction algorithm is minimized AND/XOR multi-level circuits. The circuits apply to Roth-Karp decomposition which is most commonly used technique in the FPGA technology mapping. We tested the FPGA synthesis method using pattern extraction on a set of benchmark. The proposed method achieved reductions on the number of LUTs in mapping soultion as compared with MISII(or SIS) or previous results〔5〕

• Journal of Electrical Engineering and information Science
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• v.3 no.3
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• pp.342-347
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• 1998

An OptiNeural system is developed for optical pattern classification. It is a novel hybrid system which consists of an optical processor and a multilayer neural network. It takes advantages of two dimensional processing capability of an optical processor and nonlinear mapping capability of a neural network. The optical processor with a binary phase only filter is used as a preprocessor for feature extraction and the neural network is used as a decision system through mapping. OptiNeural system is trained for optical pattern classification by use of a simulated annealing algorithm. Its classification performance for grey tone texture patterns is excellent, while a conventional optical system shows poor classification performance.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.12
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• pp.918-922
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• 2009

Naturally, block mapping FTL works well for sequential writes while page mapping FTL does well for random writes. To exploit their advantages, a practical FTL should be able to selectively apply a suitable scheme between page and block mappings for each write pattern. To meet that requirement, we propose a hybrid mapping FTL, which we call Janus-FTL, that distributes data to either block or page mapping areas. Also, we propose the fusion operation to relocate the data from block mapping area to page mapping area and the defusion operation to relocate the data from page mapping area to block mapping area. And experimental results of Janus-FTL show performance improvement of maximum 50% than other hybrid mapping FTLs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.391-406
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• 2014

The performance of General-Purpose computation on Graphics Processing Units (GPGPU) is heavily dependent on the memory access behavior. This sensitivity is due to a combination of the underlying Massively Parallel Processing (MPP) execution model present on GPUs and the lack of architectural support to handle irregular memory access patterns. Application performance can be significantly improved by applying memory-access-pattern-aware optimizations that can exploit knowledge of the characteristics of each access pattern. In this paper, we present an algorithmic methodology to semi-automatically find the best mapping of memory accesses present in serial loop nest to underlying data-parallel architectures based on a comprehensive static memory access pattern analysis. To that end we present a simple, yet powerful, mathematical model that captures all memory access pattern information present in serial data-parallel loop nests. We then show how this model is used in practice to select the most appropriate memory space for data and to search for an appropriate thread mapping and work group size from a large design space. To evaluate the effectiveness of our methodology, we report on execution speedup using selected benchmark kernels that cover a wide range of memory access patterns commonly found in GPGPU workloads. Our experimental results are reported using the industry standard heterogeneous programming language, OpenCL, targeting the NVIDIA GT200 architecture.

• Tunnel and Underground Space
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• v.21 no.6
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• pp.439-449
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• 2011

The characteristics of rock fractures for engineering rock classification are investigated by analyzing three dimensional point cloud generated from adjusted digital images of a tunnel face during construction and the tunnel is reinforced based on the supporting pattern suggested by the RMR and the Q system using parameters extracted from those images. As results, it is possible saving time required from face mapping to tunnel reinforcing work, enhancing safety during face mapping work in tunnels and reliability of both the mapping information and selecting supporting pattern by storing the files of digital images and related information which can be checked again, if necessary sometime in the future.

• Journal of the Korea Society of Computer and Information
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• v.21 no.2
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• pp.105-112
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• 2016

In this paper, we propose a technique that can be mapped to the most appropriate type of health patterns, depending on the health status of health promotion measures to establish a body mass index (BMI). When used as a mapping scheme proposed in this paper it is possible to contribute to effective healthcare and health promotion. BMI is widely used as a simple way to assess obesity because body fat increases the status and relevance. Despite normal weight determined by this and because of the social atmosphere has increased prefer the skinny tend to try to excessive weight loss. Since health can affect the health maintenance and promotion of the rest of your life, depending on whether and how much weight perception and health can be considered as very important. Therefore, this paper identifies the differences in perception and in this respect for the body mass index (BMI). And physical, mental and map the appropriate type of pattern in the relationship between body mass index (BMI) in order to facilitate the social and health conditions. Proposal to give such a mapping technique provides the opportunity to increase the efficiency of health care and health promotion.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.842-847
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• 2005

This paper proposes a novel real-time EMG pattern recognition for the control of a multifunction myoelectric hand from four channel EMG signals. To cope with the nonstationary signal property of the EMG, features are extracted by wavelet packet transform. For dimensionality reduction and nonlinear mapping of the features, we also propose a linear-nonlinear feature projection composed of PCA and SOFM. The dimensionality reduction by PCA simplifies the structure of the classifier, and reduces processing time for the pattern recognition. The nonlinear mapping by SOFM transforms the PCA-reduced features to a new feature space with high class separability. Finally a multilayer neural network is employed as the pattern classifier. We implement a real-time control system for a multifunction virtual hand. From experimental results, we show that all processes, including virtual hand control, are completed within 125 msec, and the proposed method is applicable to real-time myoelectric hand control without an operation time delay.