• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.3
• /
• pp.139-145
• /
• 1993

Partitioning is an important step in the hierarchical design of very large scale integrated circuits. In this research, a new effective partitioning algorithm based on 2-level hierarchy is presented. At the beginning, clusters are formed to reduce the problem size. To overcome the weakness of the iterative improvement techniques that the partitioning result is dependent on the initial partitioning and to consistently produce good results, the cluster-level partitioning is performed several times using several sets of parameters. Then the best result of cluster-partitioning is used as the initial solution for lower level partitioning. For each partitioning, the gradual constraint enforcing partitioning method has been used. The clustering-based partitioning algorithm has been applied to several benchmark examples and produced promising results which show that this algorithm is efficient and effective.

• Journal of the military operations research society of Korea
• /
• v.22 no.1
• /
• pp.81-96
• /
• 1996

In a relational database environment, partitioning of data is directly concerned with the amount of data that needs to be required in a query or transaction. In this paper, we consider non-overlapping, vertical partitioning. Vertical partitioning algorithm in this paper is composed of two phases. In phase 1, we cluster the attributes with zero-one integer program that maximize affinity among attributes. The result of phase 1 is called 'Initial Fragments'. In phase 2, we modify Initial Fragments that is not directly considered by cost factors, making use of a transaction-based partitioning method. A transaction-based partitioning method is partitioning attributes according to a set of transactions. In this phase we select logical accesses which needs to be required in a transaction as comparison criteria. In phase 2, proposed algorithm consider only small number of modification of Initial Fragments in phase 1. This algorithm is so insensible to number of transactions and of attributes that it can applied to relatively large problems easily.

• Proceedings of the IEEK Conference
• /
• 2004.06b
• /
• pp.553-556
• /
• 2004

In this paper, we present a new efficient multi-level hardware/software partitioning algorithm for system-on-a-chip design. Originally the multi-level partitioning algorithm are proposed to enhance the performance of previous iterative improvement partitioning algorithm for large scale circuits. But when designing very complex and heterogeneous SoCs, the HW/SW partitioning decision needs to be made prior to refining the system description. In this paper, we present a new method, based on multi-level algorithm, which can cover SoC design. The different variants of algorithm are evaluated by a randomly generated test graph. The experimental results on test graphs show improvement average $9.85\%$ and $8.51\%$ in total communication costs over FM and CLIP respectively.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.29A no.4
• /
• pp.91-98
• /
• 1992

In this paper, a new heuristic algorithm for designing combinational circuits suitable for verification testing is presented. The design method consists of argument reduction, input partitioning, output partitioning, and logic minimization. A new heuristic algorithm for input partitioning and output partitioning is developed and applied to designing combinational circuits to demonstrate its effectiveness.

• Journal of the Institute of Convergence Signal Processing
• /
• v.2 no.4
• /
• pp.97-102
• /
• 2001

In computer-aided design, partitioning is task of clustering objects into groups to that a given objection function is optimized It is used at the layout level to fin strongly connected components that can be placed together in order to minimize the layout area and propagation delay. Partitioning can also be used to cluster variables and operation into groups for scheduling and unit selection in high-level synthesis. The most popular algorithms partitioning include the Kernighan-Lin algorithm Fiduccia-Mattheyses heuristic and simulated annealing In this paper we propose a genetic algorithm searching solution space for the circuit partitioning problem. and then compare it with simulated annealing by analyzing the results of implementation.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.35C no.4
• /
• pp.1-10
• /
• 1998

Partitioning problem of large combinational logic has been studied in real world. Most of logic include undectable faults from the structure of it's redundant, fan-out-reconvergent, and symetrical feature. BPT algorithm is proposed to enhance the fault voverage for combinational logic partitioning. This algorithm partitions the logic by cut the lines related to undetectable structure when seperating. Controllability and observability are considered in the process of partitioning. This algorithm is evaluated effective by testing ISCAS85 circuits.

• The Journal of the Korea Contents Association
• /
• v.21 no.7
• /
• pp.164-170
• /
• 2021

In VLSI design, partitioning is a task of clustering objects into groups so that a given objective circuit is optimized. It is used at the layout level to find strongly connected components that can be placed together in order to minimize the layout area and propagation delay. The most popular algorithms for partitioning include the Kernighan-Lin algorithm, Fiduccia-Mattheyses heuristic and simulated annealing. In this paper, we propose a adapted genetic algorithm searching solution space for the circuit partitioning problem, and then compare it with simulated annealing and genetic algorithm by analyzing the results of implementation. As a result, it was found that an adaptive genetic algorithm approaches the optimal solution more effectively than the simulated annealing and genetic algorithm.

• Structural Engineering and Mechanics
• /
• v.14 no.6
• /
• pp.625-647
• /
• 2002

Parallel execution of computational mechanics codes requires efficient mesh-partitioning techniques. These mesh-partitioning techniques divide the mesh into specified number of submeshes of approximately the same size and at the same time, minimise the interface nodes of the submeshes. This paper describes a new mesh partitioning technique, employing Genetic Algorithms. The proposed algorithm operates on the deduced graph (dual or nodal graph) of the given finite element mesh rather than directly on the mesh itself. The algorithm works by first constructing a coarse graph approximation using an automatic graph coarsening method. The coarse graph is partitioned and the results are interpolated onto the original graph to initialise an optimisation of the graph partition problem. In practice, hierarchy of (usually more than two) graphs are used to obtain the final graph partition. The proposed partitioning algorithm is applied to graphs derived from unstructured finite element meshes describing practical engineering problems and also several example graphs related to finite element meshes given in the literature. The test results indicate that the proposed GA based graph partitioning algorithm generates high quality partitions and are superior to spectral and multilevel graph partitioning algorithms.

• Journal of KIISE:Computer Systems and Theory
• /
• v.26 no.12
• /
• pp.1548-1555
• /
• 1999

본 논문에서는 하이퍼그래프의 {{{{k분 분할을 위한 서열화(vertex ordering) 알고리즘의 효율을 개선하기 위한 후처리 알고리즘인 재서열법을 소개한다. 제안된 알고리즘은 {{{{k분 분할을 위한 다양한 알고리즘에 쉽게 적용될 수 있다. 보통 초기 분할은 서열화를 기반으로 하는 알고리즘에 의해 형성된다. 그 후 제안된 알고리즘은 클러스터와 정점을 재배열하여 분할하는 과정을 반복함으로써 분할의 효율을 향상시켜간다. 이 방법을 여러 가지 그래프에 적용하여 향상된 결과를 얻었다.Abstract This paper addresses the post-processing algorithm for {{{{k-way hypergraph partitioning by using a cluster and vertex reordering method. The proposed algorithm applies to several {{{{k-way partitioning algorithm. Generally, the initial partition generating method is based on a vertex ordering algorithm. Our reordering algorithm construct an enhanced partitioning by iteratively partition the reodered clusters and vertices. Experimental results on several graphs demonstrate that reodering provides substantial enhancement.

• Journal of the Korean Society of Industry Convergence
• /
• v.4 no.1
• /
• pp.87-94
• /
• 2001

In multibody dynamics, differential and algebraic equations which can satisfy both equation of motion and kinematic constraint equation should be solved. To solve this equation, coordinate partitioning method and constraint stabilization method are commonly used. The coordinate partitioning method divides the coordinate into independent and dependent coordinates. The most typical coordinate partitioning method arc LU decomposition, QR decomposition, projection method and SVD(sigular value decomposition).The objective of this research is to find a efficient coordinate partitioning method in flexible multibody systems and a hybrid decomposition algorithm which employs both LU and projection methods is proposed. The accuracy of the solution algorithm is checked with a slider-crank mechanism.