• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.109-112
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• 1988

All parasitics such as switch conduction voltages, conduction resistances, switching times and ESR''s of capacitors are counted in the new state-space modeling based on non-ideal switching functions. An equivalent simplified model is derived from the complex circuit with parasitics. Hence the results are very simple and exact, which are very important features of modelings. The pole frequency, dc voltage gain, and efficiency of the general converter, the buck-boost converter are analyzed and verified by the experiments with good agreements with the theories. This may be a good summary for the previous works concerned with parasitics.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.181-184
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• 1999

This paper presents the accurate deembeding method for pad and parasitics of MOSFET device. rad effects are deembedded using THRU LINE, which is much simpler method without laborious fitting procedure compared with conventional OPEN and SHORT pad modeling. Parasitic resistance extraction uses the algebraic relation between increments of inversion layer charge and oxide capacitance. It is especially adequate for insulating gate junction device. Extracted parasitics are verified through comparing modeled and measured S parameters.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.10
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• pp.34-43
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• 1990

An improved parameter adaptation and control law for robot manipulator are proposed based on a linearized parametric system equation and augmented error vectors. In view of the modeling error and parasitics with small time constants which inevitably introduced during modelling process, their effects on the robustness of the system performance are reviewed and as an conutermearsure, adaptation mechanism with low pass filter is proposed. Proposed parameter adaptation and control low assure the stability of the robot manipulator in the large without further assumption. Computer simulation shows its effectiveness of the proposed adaptation mechanism to improve the robustness of the system in presence of the parasitics in the system and superior performance for high speed operations make it an attractive option in application of the adaptive control field for robot manipulator.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.91-97
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• 1998

The modulation performance of 10 Gbps electro-absorption InGaAsP/InGaAsP strain compensated MQW (Multiple Quantum Well) modulator module depends on the modulator as well as the package parasitics. The high frequency package parasitics resulting from various structural discontinuities, limit the modulation bandwidth and increase the chirp-parameter. Therefore, we propose the double bondwires embedded in dielectric materials to minimize the bondwire parasitics. Using the proposed structure with 50 $\Omega$ terminating resistor, the modulation bandwidth is greatly increased by 125 % than the bare chip and the chirp-parameter is also reduced. This technique can be used in optimizing the package of high speed external modulators.

• ETRI Journal
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• v.27 no.5
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• pp.628-634
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• 2005

From AC analysis results utilizing a 2-dimensional device simulator, we extracted an AC-equivalent circuit of a grounded-gate NMOS (ggNMOS) electrostatic discharge (ESD) protection device. The extracted equivalent circuit is utilized to analyze the effects of the parasitics in a ggNMOS protection device on the characteristics of a low noise amplifier (LNA). We have shown that the effects of the parasitics can appear exaggerated for an impedance matching aspect and that the noise contribution of the parasitic resistances cannot be counted if the ggNMOS protection device is modeled by a single capacitor, as in prior publications. We have confirmed that the major changes in the characteristics of an LNA when connecting an NMOS protection device at the input are reduction of the power gain and degradation of the noise performance. We have also shown that the performance degradation worsens as the substrate resistance is reduced, which could not be detected if a single capacitor model is used.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.2
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• pp.21-26
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• 1997

The dielectric effects on the parasitics of bondwires buried in slightly-lossy dielectric materials hav been investigated over a wide frequency range using the method of moments with incorporation of ohmic and dielectric losses. The FR-4 composite is widely used as a basis material for PCB and plastic packages, because of it sinherent electricl and chemical stbility and low cost. The cole-cole model, which is representative complex permittivity model of epoxy polymers, has been applied to consider the dielectric effects in the MoM calculation. The prasitic impedance of a grounded bondwire in FR-4 composite is greatly increased due to the dielectric loading effect enhanced by the radiation at high frequencies. These calculation results will be helpful for designing and packaging of high-frequency low-cost IC's.

• Journal of Advanced Navigation Technology
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• v.15 no.4
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• pp.596-601
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• 2011

This paper has presented research results for the switching mode class E frequency multiplier that has simple circuit structure and high efficiency. Frequency multiplication is coming from the nonlinearity of the active component, and this paper models the FET active component as a simple switch and some parasitics to analyze the characteristics. The matching component parameters for the class E frequency doubler have been derived with modeling the FET as a input controlled switch and some parasitics. A circuit simulator, ADS, is used to simulate the output voltage and current waveform and efficiency with the variation of the parasitic values. With 2.9GHz input and 2V bias, the drain efficiency has been decreased from 98% to 28% with changing the parasitic capacitance from 0pF to 1pF at 5.8GHz output, which shows that the parasitic capacitance CP has the most significant effect on the efficiency among the parasitics of FET.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.329-334
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• 2005

In this paper, the characteristics of linealy bent wire antennas are first analyzed for shortening straight wire antennas. The results are appropriately applied to the design of the integrated zigzag dipole antenna. Since the integration give rise to discontinuities due to line width, the integrated parasitics are properly attached to both sides of substrate for improving the antenna gain and return loss. The design results are verified with experiments.

• Journal of IKEEE
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• v.24 no.3
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• pp.845-852
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• 2020

Developing standard cells for 3nm and beyond requires significant advances in the device and interconnect technology. Thus, it is very important to quantify the impact of the new technology in various aspects. In this paper, we perform a through analysis on the impact of Buried Power Rail (BPR) and Complementary FET (CFET) in the perspective of cell area and parasitics such as capacitance. We emphasize that CFET is a technology that realizes 4T and beyond for standard cell designs, but significant capacitance increases (+18.0%), compared to its counterpart technology (FinFET) cell, due to the increase of cell height in the Z-direction.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.1
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• pp.82-86
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• 2002

It is demonstrated that the conventional current-pulse laser drivers are not adequate in driving VCSELs operating at multi-Gb/s speeds. Simulation results, including the bonding parasitics, show that high-performance VCSELs are more efficiently driven using voltage-pulse mode of operation. The optical output power is almost doubled in the voltage-mode of operation, while the total electrical power consumption of the transmitter decreases by 20%.