• 대한치과교정학회지
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• 제44권2호
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• pp.62-68
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• 2014

Objective: The purpose of this study was to examine the symmetry and parallelism of the skeletal and soft-tissue poria by three-dimensional (3D) computed tomographic (CT) imaging. Methods: The locations of the bilateral skeletal and soft-tissue poria in 29 patients with facial asymmetry (asymmetric group) and 29 patients without facial asymmetry (symmetric group) were measured in 3D reconstructed models of CT images by using a 3D coordinate system. The mean intergroup differences in the anteroposterior and vertical angular deviations of the poria and their anteroposterior and vertical parallelism were statistically analyzed. Results: The symmetric and asymmetric groups showed significant anteroposterior angular differences in both the skeletal and the soft-tissue poria (p = 0.007 and 0.037, respectively; Mann-Whitney U-test). No significant differences in the anteroposterior and vertical parallelism of the poria were noted ($p{\leq}0.05$; Wilcoxon signed-rank test). Conclusions: In general, the skeletal poria are parallel to the soft-tissue poria. However, patients with facial asymmetry tend to have asymmetric poria.

• 정보관리연구
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• 제29권3호
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• pp.1-26
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• 1998

순차 Java 프로그램을 병렬 머쉰에서 실행할 경우 루프는 전체 수행 시간 중 많은 부분을 차지하므로 병렬성 검출의 기본이 된다. 본 논문은 기존에 작성된 단일 루프 구조를 갖는 Java 프로그래밍 언어에서 종속성 분석을 수행하여 묵시적 병렬성을 검출하는 방법을 제안한다. 또한 재구성 컴파일러에 의하여 병렬 코드를 생성하는 방법과 Java 원시 프로그램을 Java 프로그래밍 언어 자체에서 지원하는 다중스레드 기법으로 변환하는 방법을 제안한다. 스레드 문장으로 변환된 프로그램에 대해 루프의 반복계수와 쓰레드 수를 매개변수로 하여 성능 분석을 하였다. 재구성 컴파일러에 의한 장점은 사용자의 병렬성 검출에 대한 오버헤드를 줄이고, 순차 Java 프로그램에 대한 효과적인 병렬성 검출을 가능하게 한다.

• Design & Manufacturing
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• 제16권3호
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• pp.16-21
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• 2022

In order to reduce the weight of parts and materials for the development of high-efficiency engines in accordance with the strengthening of automobile fuel efficiency regulations, the existing casting material is changed to a iron plate material, and plastic processing and turning operations are performed to lighten the weight and reduce the manufacturing cost. Among the pulley components applied to the damper pulley, the HUB product was manufactured by plastic machining instead of the existing casting process, and the inspection standardized for automating the inner diameter and parallelism measurement of the turning result of the new hub part with improved quality, and the inspection system for this Development of design and operation software to automate the inspection of the inner diameter and parallelism of the hub was described. The representative specifications of the development equipment are a hub inner diameter 22mm inspection system, a three-point inspection system with a parallelism of 0.15mm on the top.

• International Journal of Contents
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• 제2권4호
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• pp.8-11
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• 2006

This paper describes several loop partitioning techniques such as loop splitting method by thresholds and Polychronopoulos' loop splitting method for exploiting parallelism from single loop which already developed. We propose improved loop splitting method for maximizing parallelism of single loops with non-constant dependence distances. By using the distance for the source of the first dependence, and by our defined theorems, we present generalized and optimal algorithms for single loops with non-uniform dependences. The algorithms generalize how to transform general single loops into parallel loops.

• International Journal of Contents
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• 제3권3호
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• pp.15-19
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• 2007

We review some loop partitioning techniques such as loop splitting method by thresholds and Polychronopoulos' loop splitting method for exploiting parallelism from single loop which already developed. We propose improved loop splitting method for maximizing parallelism of single loops with non-constant dependence distances. By using the iteration and distance for the source of the first dependence, and by our defined theorems, we present generalized and optimal algorithms for single loops with non-uniform dependences. The algorithms generalize how to transform general single loops with one dependence as well as with multiple dependences into parallel loops.

• IEIE Transactions on Smart Processing and Computing
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• 제4권1호
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• pp.28-34
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• 2015

Several parallelization methods that can be applied to High Efficiency Video Coding (HEVC) decoders are evaluated. The market requirements of high-resolution videos, such as Full HD and UHD, have been increasing. To satisfy the market requirements, several parallelization methods for HEVC decoders have been studied. Understanding these parallelization methods and objective comparisons of these methods are crucial to the real-time decoding of high-resolution videos. This paper introduces the parallelization methods that can be used in HEVC decoders and evaluates the parallelization methods comparatively. The experimental results show that the average speed-up factors of tile-level parallelism, wavefront parallel processing (WPP), frame-level parallelism, and 2D-wavefront parallelism are observed up to 4.59, 4.00, 2.20, and 3.16, respectively.

• 한국컴퓨터정보학회논문지
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• 제10권5호
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• pp.95-102
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• 2005

본 논문에서는 MLP신경망의 패턴 학습과정을 위하여 시공간 병렬성을 고려한 병렬처리모델을 제시한다. 시간 병렬성을 위한 학습집합 분할과 공간 병렬성을 위한 네트워크 분할을 동시 적용하여 융통성있는 병렬처리모델을 설계하고자 하였다. 성능평가모델로부터 해석적으로 구한 결과, 대규모 과제라고 해도 패턴 크기와 패턴 갯수 중 어느 쪽이 지배적이냐에 따라 분할병렬처리 방법이 절충되어야 할 것으로 본다.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제1권1호
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• pp.35-53
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• 1997

This paper analyzes the time complexity of Genetic Algorithm based Task Scheduling (GATS) which is designed for the scheduling of parallel programs with diverse embedded parallelism types in a heterogeneous network systems. The analysis of time complexity is performed based on two representation methods (REIA, REIS) which are proposed in this paper to encode the scheduling information. And the heterogeneous network systems consist of a set of loosely coupled parallel and vector machines connected via a high-speed network. The objective of heterogeneous network computing is to solve computationally intensive problems that have several types of parallelism, on a suite of high performance and parallel machines in a manner that best utilizes the capabilities of each machine. Therefore, when scheduling in heterogeneous network systems, the matching of the parallelism characteristics between tasks and parallel machines should be carefully handled in order to obtain more speedup. This paper shows how the parallelism type matching affects the time complexity of GATS.

• 한국항행학회논문지
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• 제14권6호
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• pp.984-989
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• 2010

본 논문에서는 초소형 정밀 마이크로 흐름센서를 설계하기 위해 Java 멀티스레드를 이용한 병렬 프로그래밍 기법을 도입하여 센서 모듈의 성능 분석과 개선이 가능한 병렬처리형 설계 툴을 개발하였다. 연산에 따른 기본 성능을 측정하기 위하여 열운송 방정식에 지배되는 포텐셜 문제를 두 개의 실험모델로 나누어 실험을 수행하였다. 시뮬레이션 결과 네트워크 PC의 수를 증가시키면 이와 비례하는 속도향상 특성이 나타났다. 따라서 본 연구에서 제안하는 병렬화 방안은 대규모 연산모델에도 적용 가능함을 확인하였다.

• 대한임베디드공학회논문지
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• 제6권6호
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• pp.345-359
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• 2011

In high performance embedded systems, the use of multiple on-chip memories is an essential architectural feature for exploiting inherent parallelism in multimedia applications. This feature allows multiple data accesses to be executed in parallel. However, it remains difficult to effectively exploit of multiple on-chip memories. The successful use of this architecture strongly depends on how to efficiently detect and exploit memory parallelism in target applications. In this paper, we propose a technique based on a linear array access descriptor [1], which is generated from profiled data, to detect and exploit memory parallelism. The proposed technique tackles an array reorganization problem to maximize memory parallelism in multimedia applications. We present preliminary experiments applying the proposed technique onto a representative coarse grained reconfigurable array processor (CGRA) with multimedia kernel codes. Our experimental results demonstrate that our technique optimizes data placement by putting independent data on separate storage. The results exhibit 9.8% higher performance on average compared to the existing method.