• Journal of Electrical Engineering and Technology
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• 제8권5호
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• pp.1212-1220
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• 2013

In general, for a large power system like DC distribution system for buildings, several power converters are modularized for parallel operation. However, in parallel operation, inconsistency of parameters in each module causes circulating current in the whole system. Circulating current is directly related to loss, and, therefore, it is most important for the safety of the power system to supply the suitable current to each module. This paper proposes a control method to reduce circulating current caused during parallel operation. Accordingly, the validity of parallel operation system including response characteristics and normal state was verified by simulation and experiment result.

• Journal of the Optical Society of Korea
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• 제19권1호
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• pp.45-54
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• 2015

In this study, a novel parallel wavefront correction system architecture is proposed, and a model-based tabu search (MBTS) algorithm is introduced for this new system to compensate wavefront aberration caused by atmospheric turbulence in a free-space optical (FSO) communication system. The algorithm flowchart is presented, and a simple hypothetical design for the parallel correction system with multiple adaptive optical (AO) subsystems is given. The simulated performance of MBTS for an AO-FSO system is analyzed. The results indicate that the proposed algorithm offers better performance in wavefront aberration compensation, coupling efficiency, and convergence speed than a stochastic parallel gradient descent (SPGD) algorithm.

• Journal of Power Electronics
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• 제15권4호
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• pp.886-898
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• 2015

The design feasibility of a micro unidirectional DC transmission system based on an input-parallel output-parallel (IPOP) converter is analyzed in this paper. The system consists of two subsystems: an input-parallel output-series (IPOS) subsystem to step up the DC link voltage, and an input-series output-parallel (ISOP) subsystem to step down the output voltage. The two systems are connected through a transmission line. The challenge of the delay caused by the communication in the control system is addressed by introducing a ring communication structure, and its influence on the control system is analyzed to ensure the feasibility and required performance of the converter system under practical circumstances. Simulation and experiment results are presented to verify the effectiveness of the proposed design.

• Journal of applied mathematics & informatics
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• 제5권2호
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• pp.277-284
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• 1998

The reliability and an estimate for it are derived for series-parallel and parallel-deries stress-strength model under assumption that all components are subjected to a common stress. We also obtain the asymptotic normal distribution of the estimate.

• 한국산업융합학회 논문집
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• 제26권6_2호
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• pp.1097-1108
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• 2023

Recently, demand for technology for energy economy and stable supply is increasing due to the increase in power demand of loads. The amount of DC power generation using new and renewable energy is noticeably increasing, and the use of DC power supplies is also increasing due to the increase in electric vehicles and digital loads. During parallel operation to increase the capacity of the power converter, the module bus method or the method using Can communication and serial communication has significant difficulties in smooth operation due to communication time delay for information sharing. Synchronization of information sharing of each power converter is essential for smooth parallel operation, and minimization of communication time delay is urgently needed as a way to overcome this problem. In this paper, a new communication method using pulse width information is proposed as a communication method specialized for parallel operation of power converters to compensate for the disadvantage of communication transmission delay in the existing system. The proposed communication method has the advantage of being easily implemented using the PWM and Capture function of the microcomputer. In addition, the DC/DC converter for DC distribution was verified through simulation and experiment, and it has the advantage of easy capacity expansion when applied to parallel operation of various types of power converters as well as DC/DC converters.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권5호
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• pp.465-472
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• 2013

This paper presents a low-complexity triple-error-correcting parallel Bose-Chaudhuri-Hocquenghem (BCH) decoder architecture and its efficient design techniques. A novel modified step-by-step (m-SBS) decoding algorithm, which significantly reduces computational complexity, is proposed for the parallel BCH decoder. In addition, a determinant calculator and a error locator are proposed to reduce hardware complexity. Specifically, a sharing syndrome factor calculator and a self-error detection scheme are proposed. The multi-channel multi-parallel BCH decoder using the proposed m-SBS algorithm and design techniques have considerably less hardware complexity and latency than those using a conventional algorithms. For a 16-channel 4-parallel (1020, 990) BCH decoder over GF($2^{12}$), the proposed design can lead to a reduction in complexity of at least 23 % compared to conventional architecttures.

• 융합정보논문지
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• 제8권6호
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• pp.237-242
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• 2018

우리 주변에는 다양한 '무선 통신 기술'이 존재한다. 하지만 무선 통신 기술의 발달로 인해 주파수 자원을 필요로 하는 기술이 늘어나면서 주파수 부족 현상이 심각하게 대두되었다. 최근 이러한 문제를 해결할 수 있는 대안으로 떠오르는 통신기술로 '가시광 통신'이 주목받고 있다. '가시광 통신'은 직렬데이터 송수신을 기반으로 하는 통신 방법으로 발신부의 한계 및 포토다이오드를 이용하는 수신단의 문제 때문에 병렬데이터 송수신에 어려움이 있다. 본 논문에서는 이러한 가시광 통신의 병렬데이터 처리에 대하여 연구했다. 가시광 통신 시스템에 영상처리를 적용한 병렬데이터 분석을 통해 병렬데이터 분석 방법을 구현하였다. 제안 시스템에서 입출력 데이터 매칭 비교를 통해 병렬 통신 성능을 확인할 수 있었으며 병렬데이터 분석에 다양성을 제시할 것으로 기대된다.

• 산업기술연구
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• 제21권A호
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• pp.97-103
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• 2001

This paper presents the development of the I/O Interface for the real time parallel data communication between controller of a six-axis industrial robot(CRS-A460) and an external computer. The proposed I/O Interface consists of the hardware I/O interface and the software that is downloaded to the robot controller and executed by the controller operating system. The constitution of the digital I/O Port for CRS-A460 robot controller and the digital I/O board for IBM-PC are presented as well as the Process Control Program of the robot controller. The developed protocol for the parallel data communication is described. The data communication is tested, and the performance is analysed. In particular, it is shown that the real-time constraint of the robot controller process is satisfied.

• 제어로봇시스템학회논문지
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• 제6권6호
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• pp.492-499
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• 2000

In this paper, realization techniques of the parallel processing and the parallel network system for image processing are described. The parallel image processing system is constructed by the characterization of image processing and processor. Several problems are solved to achieve effective parallel processing and processor networking with the particular properties of image processing, which are reduction of communication quantity, equalization of load and delay depreciation on communication. A parallel image input device is developed for the flexible networking of parallel image processing. An abnormal region detection algorithm which is the basic function in machine vision is applied to evaluate the constructed parallel image processing system. The performance and effectiveness of the system are confirmed by experiments.

• International Journal of Internet, Broadcasting and Communication
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• 제11권3호
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• pp.1-7
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• 2019

Previously, parallel computing was mainly used in areas requiring high computing performance, but nowadays, multicore CPUs and GPUs have become widespread, and parallel programming advantages can be obtained even in a PC environment. Various parallel programming frameworks using multicore CPUs such as OpenMP and PPL have been announced. Nvidia and AMD have developed parallel programming platforms and APIs for program developers to take advantage of multicore GPUs on their graphics cards. In this paper, we develop digital image transformation programs that runs on each of the major parallel programming frameworks, and measure the execution time. We analyze the characteristics of each framework through the execution time comparison. Also a constant K indicating the ratio of program execution time between different parallel computing environments is presented. Using this, it is possible to predict rough execution time without implementing a parallel program.