• KIEE International Transactions on Power Engineering
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• v.5A no.4
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• pp.412-415
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• 2005

The recent requirement for faster and more frequent solutions has encouraged the consideration of parallel implementations using decentralized processors. Distributed multi-processor environments can potentially greatly increase the available computational capacity and decrease the communication burden, allowing for faster Optimal Power Flow (OPF) solutions. This paper presents a mathematical approach to implementing distributed OPF using the alternating direction method (ADM) to parallelize the OPF. Several IEEE Reliability Test Systems were adopted to demonstrate the proposed algorithm.

• ETRI Journal
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• v.28 no.4
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• pp.453-460
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• 2006

In this article, we introduce a new class of product codes based on convolutional codes, called convolutional product codes. The structure of product codes enables parallel decoding, which can significantly increase decoder speed in practice. The use of convolutional codes in a product code setting makes it possible to use the vast knowledge base for convolutional codes as well as their flexibility in fast parallel decoders. Just as in turbo codes, interleaving turns out to be critical for the performance of convolutional product codes. The practical decoding advantages over serially-concatenated convolutional codes are emphasized.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.217-218
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• 2018

Droop control method is the conventional controller to solve the problem of current sharing error and voltage deviation that can occur in parallel connection of DC-DC converter. This paper compared V-I droop control with I-V droop control, which based on communication and confirmed the results through experiments.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2206-2208
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• 2002

In this paper, using the communication port between PC(Personal Computer) and DC/STEP MOTOR DEVICE that movement and measurement of motor. Communication port used serial port and movement order transmits by communication port. Consequence of motor device movement displays to tile DC/STEP MOTOR DEVICE APPLICATION. This connection is using the serial port instead of parallel port faster than response time And this application is easier than existing application.

• International Journal of Internet, Broadcasting and Communication
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• v.4 no.1
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• pp.13-17
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• 2012

Indexing allows converting raw document collection into easily searchable representation. Web searching by Google or Yahoo provides subsecond response time which is made possible by efficient indexing of web-pages over the entire Web. Indexing process gets challenging when the scale gets bigger. Parallel techniques, such as MapReduce framework can assist in efficient large-scale indexing process. In this paper we propose PDFindexer, system for indexing scientific papers in PDF using MapReduce programming model. Unlike Web search engines, our target domain is scientific papers, which has pre-defined structure, such as title, abstract, sections, references. Our proposed system enables parsing scientific papers in PDF recreating their structure and performing efficient distributed indexing with MapReduce framework in a cluster of nodes. We provide the overview of the system, their components and interactions among them. We discuss some issues related with the design of the system and usage of MapReduce in parsing and indexing of large document collection.

• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.6
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• pp.20-23
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• 1976

A boolean algebra method for computing the reliability in a communication network is prosented. Given the set of all simple paths between two nodes in a network, the terminal reliability can be symbolically computed by the Boolean operation which is named parallel operation. The method seems to be promising for both oriented and nonoriented network.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.278-284
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• 2005

In this paper, phase controlled series resonant converter (PCSRC) system for power supply of communication station is suggested. PCSRC system is robust to load variations because it is POSR (parallel output series resonant) type. And it provides stable output voltage by changing phase of MOSFET switches to input voltage variations. Firstly, operation analysis about suggested series resonant converter system was carried. Then simulations using PSIM and experiments to actual system were carried to prove characteristics of suggested system.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1956-1958
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• 2002

This paper reviews the calculation of induced voltage to a communication line from Power Transmission Line. Power lines, both overhead and underground, often run parallel to weak current lines, such as telecommunication, signal or data transmission systems or protection circuits. The coexistence of both systems in parallel over long lengths is accompanied by the possible induction of significant longitudinal voltage in the weak current line. In order to evaluate a precise induced voltage, this paper indicated problem about coefficient and numerical formula and present some induced voltage production technology standard application.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 1997.11a
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• pp.79-89
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• 1997

Logic programming has many advantages as a paradigm for parallel programming because it offers ease of programming while retaining high expressive power due to its declarative semantics. In parallel logic programming, one of the important issues is the compile-time parallelism detection. Static data-dependency analysis has been widely used to gather some information needed for the detection of AND-parallelism. However, the static data-dependency analysis cannot fully detect AND-parallelism because it does not provide some necessary functions such as the propagation of groundness. As an alternative approach, abstract interpretation provides a promising way to deal with AND-parallelism detection, while a full-blown abstract interpretation is not efficient in terms of computation since it inherently employs some complex operations not necessary for gathering the information on AND-parallelism. In this paper, we propose an abstract domain which can provide a precise and efficient way to use the abstract interpretation for the detection of AND-parallelism of logic programs.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.3
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• pp.164-168
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• 2012

LDPC decoder architectures are generally classified into serial, parallel and partially parallel architectures. Conventional method of LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. It is necessary to reduce the iteration numbers and computation operations without performance degradation. This paper studies Horizontal Shuffle Scheduling (HSS) algorithm. In the result, number of iteration is half than conventional algorithm without performance degradation. Finally, this paper present design methodology of high-speed LDPC decoder and confirmed its throughput is up to about 600Mbps.