• Title/Summary/Keyword: packaging substrate

검색결과 438건 처리시간 0.018초

식품보존제를 이용한 항균지 제조 (Manufacture of Antimicrobial Paper Using Food Preservative)

  • 이진호;이장호;박종문
    • 펄프종이기술
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    • 제33권2호
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    • pp.81-86
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    • 2001
  • The functions of food packaging are not only prevention from physical damage and loss during carrying and transportation, but also extension of shelf-life by adding antimicrobial substrate in packaging materials. Consumption of active packaging is gradually increasing. With different dosage of potassium sorbate(P.S.), the food preservative agent, antimicrobial papers were made by internal and external application of starch. The antimicrobial action of the paper was analyzed by the halo test and the shake flask method. The mechanical properties and strength were also measured. Antimicrobial papers adding P.S. showed higher values in tensile index than adding starch. The antimicrobial paper using starch showed similar microbe decreasing rate as that using P.S. Though microbe decreasing rate was 21.9%, it showed possibility to make antimicrobial paper using food preservative.

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Ultra Thin 실리콘 웨이퍼를 이용한 RF-MEMS 소자의 웨이퍼 레벨 패키징 (Wafer Level Packaging of RF-MEMS Devices with Vertical feed-through)

  • 김용국;박윤권;김재경;주병권
    • 한국전기전자재료학회논문지
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    • 제16권12S호
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    • pp.1237-1241
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    • 2003
  • In this paper, we report a novel RF-MEMS packaging technology with lightweight, small size, and short electric path length. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes lot vortical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. The packaged RF device has a reflection loss under 22 〔㏈〕 and a insertion loss of -0.04∼-0.08 〔㏈〕. These measurements show that we could package the RF device without loss and interference by using the vertical feed-through. Specially, with the ultra thin silicon wafer we can realize of a device package that has low-cost, lightweight and small size. Also, we can extend a 3-D packaging structure by stacking assembled thin packages.

플렉서블 기반 미세 무연솔더 범프를 이용한 칩 접합 공정 기술 (The Chip Bonding Technology on Flexible Substrate by Using Micro Lead-free Solder Bump)

  • 김민수;고용호;방정환;이창우
    • 마이크로전자및패키징학회지
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    • 제19권3호
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    • pp.15-20
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    • 2012
  • In electronics industry, the coming electronic devices will be expected to be high integration and convergence electronics. And also, it will be expected that the coming electronics will be flexible, bendable and wearable electronics. Therefore, the demands and interests of bonding technology between flexible substrate and chip for mobile electronics, e-paper etc. have been increased because of weight and flexibility of flexible substrate. Considering fine pitch for high density and thermal damage of flexible substrate during bonding process, the micro solder bump technology for high density and low temperature bonding process for reducing thermal damage will be required. In this study, we researched on bonding technology of chip and flexible substrate by using 25um Cu pillar bumps and Sn-Bi solder bumps were formed by electroplating. From the our study, we suggest technology on Cu pillar bump formation, Sn-Bi solder bump formation, and bonding process of chip and flexible substrate for the coming electronics.

WiFi용 스위치 칩 내장형 기판 기술에 관한 연구 (The Fabrication and Characterization of Embedded Switch Chip in Board for WiFi Application)

  • 박세훈;유종인;김준철;윤제현;강남기;박종철
    • 마이크로전자및패키징학회지
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    • 제15권3호
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    • pp.53-58
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    • 2008
  • 본 연구에서는 상용화된 2.4 GHz 영역대에서 사용되어지는 WiFi용 DPDT(Double Pole Double throw) switch 칩을 laser 비아 가공과 도금 공정을 이용하여 폴리머 기판내에 내장시켜 그 특성을 분석하였으며 통상적으로 실장되는 wire 본딩방식으로 패키징된 기판과 특성차이를 분석 비교하였다. 폴리머는 FR4기판과 아지노 모토사의 ABF(Ajinomoto build up film)를 이용하여 패턴도금법으로 회로를 형성하였다. ABF공정의 최적화를 위해 폴리머의 경화정토를 DSC (Differenntial Scanning Calorimetry) 및 SEM (Scanning Electron microscope)으로 분석하여 경화도에 따라 도금된 구리패턴과의 접착력을 평가하였다. ABF의 가경화도가 $80\sim90%$일 경우 구리층과 최적의 접착강도를 보였으며 진공 열압착공정을 통해 기공(void)없이 칩을 내장할 수 있었다. 내장된 기관과 와이어 본딩된 기판의 측정은 S 파라미터를 이용하여 삽입손실과 반사손실을 비교 분석하였으며 그 결과 삽입손실은 두 경우 유사하게 나타났지만 반사손실의 경우 칩이 내장된 경우 6 GHz 까지 -25 dB 이하로 안정적으로 나오는 것을 확인할 수 있었다.

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Al2O3 첨가에 따른 potashborosilicate glass ceramic 기판의 특성변화에 관한연구 (Properties of Potashborosilicate Glass-ceramic Substrate by adding Al2O3)

  • 김용철
    • 마이크로전자및패키징학회지
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    • 제5권2호
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    • pp.53-58
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    • 1998
  • Sintering and dielectric characteristics of substrates were estimated by mixing rate of alumina and potashborosilicate glass(PBSG) powders. PBSG powders were used 7761(corning code)and alumina powders were used in extra pure rate(99.9%) and had 0.1 ${\mu}$m mean size. After ball milling with organic additives green sheets which were casted by doctor blade machine were sintered at 800$^{\circ}C$ for 1∼3hrs. Microstructure, linear shrinkage and dielectric constant of substrates were surveyed in order to fabricate low-dielectric and low tem-perature sintering substrate.

OSP(Organic Solderability Preservatives)처리된 CSP Substrate 특성 연구 (Reliability and Failure Analysis of the OSP(Organic Solderability Preservatives) Finished CSP Substrate)

  • 이효수;김종호;신영환;이병호
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
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    • pp.6-9
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    • 2003
  • 최근 휴대폰, PDA 등의 모바일 전자제품의 수요가 급격히 증가하고 마이크로 전자패키지 부품의 경박단소화에 의해서 고I/O수, 미세피치가 적용된 개발제품이 양산되고 있으나, 마이크로 전자패키지 부품의 생산비 및 솔더볼접합특성 등의 문제는 여전히 크게 이슈화 되고 있다. Organic solderability preservatives(OSPs)는 이러한 모바일용 마이크로 전자패키지 부품의 문제점을 낮은 단가로 해결할 수 있는 공정으로 평가되고 있다. 본 연구에서는 OSP 처리된 CSP의 열적특성, 화학적특성 및 기계적특성을 정량적으로 분석하여 OSP 응용범위를 제시하고자 하였다.

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