• Journal of the Microelectronics and Packaging Society
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• v.23 no.3
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• pp.43-49
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• 2016

Reliability characteristics of thin package-on-packages were evaluated using T/H (temperature/humidity) test at $85^{\circ}C/85%$ for 500 hours, TC (temperature cycling) test at $-40{\sim}100^{\circ}C$ for 1,000 cycles, and HTS (high temperature storage) test at $155^{\circ}C$ for 1,000 hours. The average resistance of the solder-bump circuitry between the top and bottom packages of 24 package-on-package (PoP) samples, which were processed using polyimide thermal tape, was $0.56{\pm}0.05{\Omega}$ and quite similar for all 24 samples. Open failure of solder joints did not occur after T/H test for 500 hours, TC test for 1,000 cycles, and HTS test for 1,000 hours, respectively.

• Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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• v.10 no.1
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• pp.37-43
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• 2012

Radioactive waste transport package was developed to transport eight drums of low and intermediate level waste(LILW) in accordance with the IAEA and domestic related regulations. The package is classified with industrial package IP-2. IP-2 package is required to undergo a free drop test and a stacking test. After free drop and stacking tests, it should prevent the loss or dispersal of radioactive contents, and loss of shielding integrity which would result in more than 20 % increase in the radiation level at any external surface of the package. The objective of this study is to establish the safety test method and procedure for stacking test and to prove the structural integrities of the IP-2 package. Stacking test and analysis were performed with a compressive load equal to five times the weight of the package for a period of 24 hours using a full scale model. Strains and displacements were measured at the corner fitting of the package during the stacking test. The measured strains and displacements were compared with the analysis results, and there were good agreements. It is very difficult to measure the deflection at the container base, so the maximum deflection of the container base was calculated by the analysis method. The maximum displacement at the corner fitting and deflection at the container base were less than their allowable values. Dimensions of the test model, thickness of shielding material and bolt torque were measured before and after the stacking test. Throughout the stacking test, it was found that there were no loss or dispersal of radioactive contents and no loss of shielding integrity. Thus, the package was shown to comply with the requirements to maintain structural integrity under the stacking condition.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.217-230
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• 2012

This paper propose interacting test programming methods between test equipment and hardware unit to verify function and performance of the hardware unit under test. Proposed test program can minimizes the risk of failures when the unit is mounted on the aircraft by testing and verifying the unit under the worst stress condition. Also, Object oriented design using UML make it easy to apply in other equipments. Test program consists of architecture package and hardware package. Architecture package is in a role for system management, log analysis, message receiving and message analysis. Messages that are used by system management define messages for testing and defined messages is sent and received to test equipment through Ethernet. Hardware package is in a role for hardware management that is needed to be tested and is related to a system. Hardware to be tested is divided into internal test and transmission test. Internal test inspects hardware itself and reports the test results to the test equipment. Transmission test inspects communication device by sending or receiving data. All kinds of test is done in the worst condition of the test unit executing in parallel. Each device is tested at least 482 times and at most 15,003 times about one hour. Test program is utilized in hardware reliability test like as environmental test or EMI test.

• The KIPS Transactions:PartD
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• v.10D no.5
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• pp.821-828
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• 2003

Package software should have the feature that enables purchasers to discriminate a product suitable for them among a number of software belonging to the similar kind of product. Purchaser's ability to choose a package software depends on whether they can judge that a package software conforms to the relevant standard through an objective quality test process and method or not. There are the standards that can be applicable to the quality evaluation of package software, such as and . This study developed a system with which purchasers can effectively select a package software suitable for their needs, building quality test process for package software and developing test metric and application method.

• Journal of Applied Reliability
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• v.3 no.2
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• pp.103-116
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• 2003

We carry out reliability tests and investigate the failure mechanisms. of the wafer level vacuum packaged MEMS gyroscope sensor using an accelerated degradation test. The accelerated degradation test (ADT) is used to evaluate reliability (and/or life) of the MEMS vacuum package and to select the accelerated test conditions, which reduce the reliability testing time. Using the failure distribution model and stress-life model, we are able to estimate the average life time of the vacuum package, which is well agreed with the measured data. After improving several package reliability issues such as prevention of gas diffusion through package, we carry out another set of accelerated tests at the chosen acceleration level. The results show that reliability of the vacuum packaged gyroscope has been greatly improved and can survive without degradation of performance, which is the Q-factor in gyroscope sensor, during environmental stress reliability tests.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.1
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• pp.327-332
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• 2021

At the package level, semiconductor reliability inspections involves mounting a semiconductor chip package on a test socket. The form of the test socket is basically determined by the form of the chip package. It also acts as a medium to connect with test equipment through mechanical contact of the leads and socket leads in the chip package, and it minimizes signal loss in a signal transmission process so that an inspection signal can be delivered well to the semiconductor. In this study, a technique was applied to examine the interdependence of adjacent electrical transfer routes and the structure of adjacent electrical transfer paths. The goal was to enable short-circuit testing of fewer than 100 silicon test sockets through a single interface for life tests and precision measurements. The test results of the developed device show a test precision of 99% or more and a simultaneous test speed characteristic of 0.66 sec or less.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.1-7
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• 2012

Reliability technology has been expected to grow rapidly for new types of electronic equipments. We have selected several reliability issues in electronic package to be reviewed. This paper will provide a view of the current state of technological progress in reliability of electronic package in Japan, and will discuss future prospects for the technology.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.109-119
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• 2003

o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.4
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• pp.1-10
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• 2015

The light emitting diodes(LED) package of new structure is proposed to promote the reliability and lifespan by maximize heat dissipation occurred on the chip. We designed and fabricated the LED packages mixing the advantages of chip on board(COB) based on conventional metal printed circuit board(PCB) and the merits of Si sub-mount using base as a substrate. The proposed LED package samples were selected for the superior efficiency of the material through the sealant properties, chip characteristics, and phosphor properties evaluations. Reliability test was conducted the thermal shock test and flux rate according to the usage time at room temperature, high-temperature operation, high-temperature operation, high-temperature storage, low-temperature storage, high-temperature and high-humidity storage. Reliability test result, the average flux rate was maintained at 97.04% for each items. Thus, the Si sub-mount based LED package is expected to be applicable to high power down-light type LED light sources.

• Transactions of the Korean Society of Automotive Engineers
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• v.18 no.5
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• pp.56-61
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• 2010

This paper presents dynamic clearance verification considering engine movement for vehicle engine room package and validates through physical vehicle test. Traditionally, static clearance guide has been used for engine room package, but it's only 2-dimension criteria that results in requiring unnecessary space and it's not possible to conduct engine movement with real driving conditions. Thus, the dynamic DMU considers engine movement based on 28 load cases that are Roll Data analyzed by CAE for maximum engine movement and visualizes part-to-part dynamic clearance into virtual space. The dynamic DMU enables to develop compact engine room package without unnecessary space. The result of comparison between simulation and physical test has 0.892 correlation coefficient.