• Proceedings of the Korean Society for Bioinformatics Conference
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• 2004.11a
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• pp.39-49
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• 2004

When there is a lack of detailed kinetic information, dFBA(dynamic flux balance analysis) has correctly predicted cellular behavior under given environmental conditions with FBA and different ial equations. However, until now, dFBA has centered on substrate concentration, cell growth, and gene on/off, but a detailed hierarchical structure of a regulatory network has not been taken into account. For this reason, the dFBA has limited the represen tation of interactions between specific regulatory proteins and genes and the whole transcriptional regulation mechanism with environmental change. Moreover, to calculate optimal metabolic flux distribution which maximizes the growth flux and predict the b ehavior of cell system, linear programming package(LINDO) and spreadsheet package(EXCEL) have been used simultaneously. thses two software package have limited in the visual representation of simulation results and it can be difficult for a user to look at the effects of changing inputs to the models. Here, we descirbes the construction of hierarchical regulatory network with defined symbolsand the development of an integrated system that can predict the total control mechanism of regulatory elements (opero ns, genes, effectors, etc.), substrate concentration, growth rate, and optimal flux distribution with time. All programming procedures were accoplished in a visual programming environment (LabVIEW).

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.11
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• pp.40-46
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• 2002

A MEMS(Micro Electro Mechanical System) package using a doped-silicon(Si) carrier for coplanar microwave and millimeter-wave integrated circuits is proposed in order to reduce parasitic problems of leakage, coupling and resonance. The proposed carrier scheme is verified by fabrication and measuring a GaAs CPW(Coplanar Waveguide) on the three types of Si-carriers(gold-plated high resistivity, lightly doped, high resistivity). The proposed MEMS package using the lightly doped(15 ${\Omega}{\cdot}$) Si-carrier shows parasitic-free performance since the lossy Si-carrier effectively absorbs and suppresses the resonant leakage.

• Journal of Korean Institute of Industrial Engineers
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• v.40 no.3
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• pp.257-266
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• 2014

The semiconductor manufacturing industry is managed by a number of parameters from the FAB which is the initial step of production to package test which is the final step of production. Various methods for prediction for the quality and yield are required to reduce the production costs caused by a complicated manufacturing process. In order to increase the accuracy of quality prediction, we have to extract the significant features from the large amount of data. In this study, we propose the method for extracting feature from the cell level data of probe test process using OPTICS which is one of the density-based clustering to improve the prediction accuracy of the quality of the assembled chips that will be placed in a package test. Two features extracted by using OPTICS are used as input variables of quality prediction model because of having position information of the cell defect. The package test progress for chips classified to the correct quality grade by performing the improved prediction method is expected to bring the effect of reducing production costs.

• The Journal of the Acoustical Society of Korea
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• v.19 no.3
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• pp.57-62
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• 2000

In recent, the innovative improvement of a internet and computing environment make users desire the capability of processing information in real time. In this paper we implement a PC-to-PC real time multi-user communication system on the internet environment using the efficient algorithm for a real time processing and the MFEG-4 CELP codec which can be used for a low bit-rate coding from 6 to 24kbps. The implemented system produces a compressed bit-streams with the MPEG-4 CEU Mode-I 18200bps mode. There is 5 frames for a package and 1 frame has 160 samples. We can use this system to communicate with 4 users simultaneously in real time. The system is designed and examined on the Windows operating system.

• Journal of the Korean Society of Food Culture
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• v.17 no.3
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• pp.299-308
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• 2002

The purposes of this study were to examine understanding, attitudes, and behaviors of college students regarding the nutrition labels of food package and the relations among these factors and demographic background such as educational experience with label, major, home place and parents' status. The study was surveyed 471 undergraduate students enrolled in general education classes at local university. Generally, college students could understand nutrition label. Nutrition related class in college didn't influence Nutrition label understanding, use and purchasing behavior. Students whose mothers with higher than college education level and professional work showed strong dependability on nutrition label. Label use, understanding and purchasing behaviors significantly associated with gender of subjects. All the subjects looked at the amount of sodium most frequently among all the nutrients listed on the food package(88.8%). Of all the food labels, the manufacturing date(25.1%) was considered the most important and the refund and exchange(12.9%) was considered the least important information. This paper suggested that nutrition education program for college students needs to be developed in series from elementary school curriculum and to enhance the use of nutrition labels.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.255-261
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• 2005

With the advent of sub-90nm technologies, the system-on-chip (SoC) and system-in-package (SiP) are becoming the trend in delivering low-cost, low-power, and small-form-factor consumer electronic systems running at multiple GHz. The shortened transistor channel length reduces the transistor switching cycles to the range of several picoseconds, yet the time-of-flights of the critical on-chip and off-chip interconnects are in the range of 10 picoseconds for 1.5mm-long wires and 100 picoseconds for 15mm-long wires. Designers realize the bottleneck today often lies at chip-to-chip interconnects and the industry needs a good model to compute the inductance in these parts of circuits. In this paper we propose a new method for extracting accurate equivalent inductance circuit models for SPICE-level circuit simulations of system-on-chip (SoC) and system-in-package (SiP) designs. In our method, geometrical meshes are created and numerical methods are used to find the solutions for the electromagnetic fields over the fine meshes. In this way, multiple-GHz SoC and SiP designers can use accurate inductance modeling and interconnect optimization to achieve high yields.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• Communications for Statistical Applications and Methods
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• v.31 no.2
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• pp.179-189
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• 2024

In multivariate regression with a high-dimensional response Y ∈ ℝ^r and a relatively low-dimensional predictor X ∈ ℝ^p (where r ≥ 2), the statistical analysis of such data presents significant challenges due to the exponential increase in the number of parameters as the dimension of the response grows. Most existing dimension reduction techniques primarily focus on reducing the dimension of the predictors (X), not the dimension of the response variable (Y). Yoo and Cook (2008) introduced a response dimension reduction method that preserves information about the conditional mean E(Y | X). Building upon this foundational work, Yoo (2018) proposed two semi-parametric methods, principal response reduction (PRR) and principal fitted response reduction (PFRR), then expanded these methods to unstructured principal fitted response reduction (UPFRR) (Yoo, 2019). This paper reviews these four response dimension reduction methodologies mentioned above. In addition, it introduces the implementation of the mbrdr package in R. The mbrdr is a unique tool in the R community, as it is specifically designed for response dimension reduction, setting it apart from existing dimension reduction packages that focus solely on predictors.

• The Transactions of the Korea Information Processing Society
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• v.4 no.9
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• pp.2391-2402
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• 1997

TINA is the Open Networking Architecture which as newly introduced software architecture shares the network managements and the service managements on the Distributed Processing Environment. In this paper, based on the concepts and principles defined up to now, we implement and test the CM(Connection Management) Package included in CM which is one of the six functional areas into which TINA Management Architecture is devided. Before the implementation we learn the basic concepts accepted by the four architectures in TINA, and medelling concept of the CM. The interfaces of eaxh information objects explain the functions of computational objects implemented, and the message flows among the computational objects show the connection setup and release procedures.

• The Journal of Information Technology
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• v.6 no.3
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• pp.65-73
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• 2003

The evaluation AP embedded Linux board is implemented. The board is made of IBM 405 GP processor, PPCBoot-1.2.1 boot loader, Linux-2.4.21 kernel and root file system. The evaluation board has two flash memories, boot flash and application flash of size 512Kbyte and 16Mbyte, respectively. And it supports IEEE 802.11a which provide the maximum throughput of 54Mbps in the 5.2GHz frequency band. MTD(Memory Technology Device) and JFFS2(Journalling Flash File System version 2) technologies are adopted to optimally package the system software, boot loader, kernel and root file system. And in order to optimize root file system, busybox package and tiny login are used. Linux kernel and root file system is combined together with mkimage utility.