• Title/Summary/Keyword: p-type thin film

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Fabrication and Characterization of CuO Thin Film/ZnO Nanorods Heterojunction Structure for Efficient Detection of NO Gas (일산화질소 가스 검출을 위한 CuO 박막/ZnO 나노막대 이종접합 구조의 제작 및 특성 평가)

  • Yoo, Hwansu;Kim, Hyojin;Kim, Dojin
    • Korean Journal of Materials Research
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    • v.28 no.1
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    • pp.32-37
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    • 2018
  • We report on the efficient detection of NO gas by an all-oxide semiconductor p-n heterojunction diode structure comprised of n-type zinc oxide (ZnO) nanorods embedded in p-type copper oxide (CuO) thin film. The CuO thin film/ZnO nanorod heterostructure was fabricated by directly sputtering CuO thin film onto a vertically aligned ZnO nanorod array synthesized via a hydrothemal method. The transport behavior and NO gas sensing properties of the fabricated CuO thin film/ZnO nanorod heterostructure were charcterized and revealed that the oxide semiconductor heterojunction exhibited a definite rectifying diode-like behavior at various temperatures ranging from room temperature to $250^{\circ}C$. The NO gas sensing experiment indicated that the CuO thin film/ZnO nanorod heterostructure had a good sensing performance for the efficient detection of NO gas in the range of 2-14 ppm under the conditions of an applied bias of 2 V and a comparatively low operating temperature of $150^{\circ}C$. The NO gas sensing process in the CuO/ZnO p-n heterostructure is discussed in terms of the electronic band structure.

Thermoelectric properties of $(Bi,;Sb)_2;(Te,;Se)_3$-based thin films and their applicability to temperature sensors ($(Bi,;Sb)_2;(Te,;Se)_3$계 박막의 열전 특성 및 온도 센서로의 응용)

  • 한승욱;김일호;이동희
    • Journal of the Korean Vacuum Society
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    • v.6 no.1
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    • pp.69-76
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    • 1997
  • P-type ($Bi_{0.5}Sb_{1.5}Te_3$) and n-type ($Bi_2Te_{2.4} Se_{0.6}$) thermoelectric thin film were deposited on glass and Teflon substrates by the flash evaporation technique. The changes in thermoelectric properties, such as Seebeck coefficient, electrical conductivity, carrier concentration, carrier mobility, thermal conductivity, and figure of merit, were investigated as a function of film thickness and annealing condition. Figures of merit of the thin films annealed at 473 K for 1 hour were improved to be $1.3{\times}10^{-3}K^{-1}$ for p-type and $0.3{\times}10^{-3}K^{-1}$ for n-type, and they were almost independent of film thickness. Temperature sensors were fabricated from the thin films having the above mentioned properties. And thermo-emf, sensitivity, and time constant of the sensors were measured to evaluate their characteristics for temperature sensors. Thin film sensors deposited on Teflon substrates showed better performance than those on glass substrates, and their sensitivity and time constant were 2.91 V/W and 28.2 sec respectively for the sensor of leg width 1 mm$\times$length 16 mm.

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Defect Analysis via Photoluminescence of p-type ZnO:N Thin Film fabricated by RF Magnetron Sputtering

  • Jin, Hu-Jie;So, Soon-Jin;Park, Choon-Bae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.3
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    • pp.202-206
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    • 2007
  • ZnO is a promising material to make high efficient ultraviolet(UV) or blue light emitting diodes(LEDs) because of its large binding energy and energy bandgap. In this study, we prepared ZnO thin films with p-type conductivity on silicon(100) substrates by RF magnetron sputtering in the mixture of $N_2$ and $O_2$. The process was accompanied by low pressure in-situ annealing in $O_2$ at $600^{\circ}C$ and $800^{\circ}C$ respectively. Hall effect in Van der Pauw configuration showed that the N-doped ZnO film annealed at $800^{\circ}C$ has p-type conductivity. Photoluminescence(PL) spectrum of the film annealed at $800^{\circ}C$ showed UV emission related to exciton and bound to donor-acceptor pair(DAP) as well as visible emission related to many intrinsic defects.

Structure and Electrical Properties of P-doped ZnO Thin Films with Annealing Temperatures (열처리 온도에 따른 P-doped ZnO 박막의 구조적 및 전기적 특성)

  • Han, Jung-Woo;Yoon, Yung-Sup;Kang, Seong-Jun;Joung, Yang-Hee
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.501-502
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    • 2008
  • In this study, P-doped ZnO thin films were prepared on sapphire substrates by pulsed laser deposition and annealing method. The electrical properties were investigated as a function of annealing temperatures at a fixed oxygen pressure. The XRD measurement showed that p-doped ZnO thin films were c-axis oriented. The Hall measurement showed that p-type ZnO thin film was observed. The carrier concentration of $1.18{\times}10^{16}cm^{-3}$ and the mobility of $0.96\;cm^{-3}/Vs$ were obtained for the P-doped ZnO thin film fabricated annealing temperature $850^{\circ}C$.

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Fabrication of a Micro Cooler using Thermoelectric Thin Film (열전박막을 이용한 마이크로 냉각소자 제작)

  • Han, S.W.;Choi, H.J.;Kim, B.I.;Kim, B.M.;Kim, D.H.;Kim, O.J.
    • Proceedings of the KSME Conference
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    • 2007.05a
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    • pp.1459-1462
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    • 2007
  • In general a thermoelectric cooler (TEC) consists of a series of P type and N type thermoelectric materials sandwiched between two wafers. When a DC current passes through these materials, three different effects take place; Peltier effect, Joule heating effect and heat transfer by conduction due to temperature difference between hot and cold plates. In this study we have developed a micro TEC using $Bi_2Te_3$ (N type) and $Bi_{0.5}Sb_{1.5}Te_3$ (P type) thin films. In order to improve that performance of a micro TEC, we made 10 um height TE legs using special PR only for lift-off. We measured COP (coefficient of performance) and temperature difference between hot and cold connectors with current.

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Structural and Electrical Properties of $CuGaS_2$ Thin Films ($CuGaS_2$ 반도체 박막의 구조적 및 전기적 특성)

  • Park, Gye-Choon;Jung, Hae-Duk;Lee, Jin;Jeong, Woon-Jo;Kim, Jong-Uk;Cho, Young-Dae;Gu, Hal-Bon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.286-289
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    • 2001
  • Single phase CuGaS$_2$ thin film with the highest diffraction peak of (112) at diffraction angle (2$\theta$) of 28.8$^{\circ}$ was made at substrate temperature of 7$0^{\circ}C$, annealing temperature of 35$0^{\circ}C$ and annealing time of 60 min. And second highest (204) peak was shown at diffraction angle (2$\theta$) of 49.1$^{\circ}$. Lattice constant of a and c of that CuGaS$_2$ thin film was 5.37 $\AA$ and 10.54 $\AA$ respectively. The greatest grain size of the thin film was about 1${\mu}{\textrm}{m}$. The (112) peak of single phase of CuGaS$_2$ thin film at annealing temperature of 35$0^{\circ}C$ with excess S supply was appeared with a little higher about 10 % than that of no exces S supply And the resistivity, mobility and hole density at room temperature of p-type CuGaS$_2$ thin film with best crystalline was 1.4 $\Omega$cm, 15 cm2/V . sec and 2.9$\times$10$^{17}$ cm$^{-3}$ respectively. It was known that carrier concentration had considerable effect than mobility on variety of resistivity of the fabricated CuGaS$_2$ thin film, and the polycrystalline CuGaS$_2$ thin films were made at these conditions were all p-type.

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A Study on the Thermally Stimulated Current of PVDF Thin Film Prepared by Physical Vapor Deposition Method (진공증착법으로 제조한 PVDF 박막의 열자격전류에 관한 연구)

  • Lee, S.W.;Park, S.H.;Kim, H.K.;Lim, E.C.;Kim, S.J.;Yuk, J.H.;Lee, D.C.
    • Proceedings of the KIEE Conference
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    • 1998.11c
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    • pp.755-757
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    • 1998
  • The thermally stimulated current (TSC) of PVDF thin film prepared by physical vapor deposition method was investigated. PVDF shows three TSC peaks designated $P_1$, $P_2$ and $P_3$ in ascending order of temperature. The $P_1$ peak is associated with water in the PVDF specimen. $P_2$ and $P_3$ Peaks are specific peaks of $\alpha$ and $\beta$ type PVDF, respectively. The peak temperature was shifted to higher temperature, and peak intensity was decreased with increasing substrate temperature under thin film preparation.

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Silicon thin film and p-n junction diode made by $CO_2$ laser-induced CVD method ($CO_2$ Laser-induced CVD법에 의한 Silicon박막 및 p-n 접합 Silicon제작)

  • Choi, H.K.;Jeong, K.;Kim, U.
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.662-666
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    • 1989
  • Pure mono Silane(Purity: 99.99%) was used as a thin film source and [$SiH_4$ + $H_2$ (5%)] + [$PH_3$ + $H_2$(0.05%)] mixed dilute gas was used for p-n junction diode. The substrate was P-type silicon wafer (p=$3{\Omega}$ cm) with the direction (100). The crystalline qualities of deposited thin film were investigated by the X-ray diffraction, RHEED and TED patterns and the voltampere characteristics of p-n junction diode was identified by I-V curve.

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PL Property of Al-N Codoped p-type ZnO Thin Films Fabricated by DC Magnetron Sputtering

  • Liu, Yan-Yan;Jin, Hu-Jie;Park, Choon-Bae;Hoang, Geun-C.
    • Transactions on Electrical and Electronic Materials
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    • v.10 no.3
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    • pp.89-92
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    • 2009
  • High-quality Al-N doped p-type ZnO thin films were deposited on Si and buffer layer/Si by DC magnetron sputtering in a mixture of $N_2$ and $O_2$ gas. The target was ceramic ZnO mixed with $Al_2O_3$ (2 wt%). The p-type ZnO thin films showed a carrier concentration in the range of $1.5{\times}10^{15}{\sim}2.93{\times}10^{17}\;cm^{-3}$, resistivity in the range of 131.2${\sim}$2.864 ${\Omega}cm$, mobility in the range of 3.99${\sim}$31.6 $cm^2V^{-1}s^{-l}$, respectively. It was easier to dope p-type ZnO films on Si substrates than on buffer layer/Si. The film grown on Si showed the highest quality of photoluminescence (PL) characteristics. The Al donor energy level depth $(E_d)$ of Al-N codoped ZnO films was reduced to about 50 meV, and the N acceptor energy level depth $(E_a)$ was reduced to 63 meV.

A single-clock-driven gate driver using p-type, low-temperature polycrystalline silicon thin-film transistors

  • Kim, Kang-Nam;Kang, Jin-Seong;Ahn, Sung-Jin;Lee, Jae-Sic;Lee, Dong-Hoon;Kim, Chi-Woo;Kwon, Oh-Kyong
    • Journal of Information Display
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    • v.12 no.1
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    • pp.61-67
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    • 2011
  • A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.