• 제목/요약/키워드: p-type Si

검색결과 952건 처리시간 0.031초

MoOx 기반 실리콘 이종접합 고성능 광검출기 (MoOx/Si Heterojunction for High-Performing Photodetector)

  • 박왕희;김준동
    • 한국전기전자재료학회논문지
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    • 제29권11호
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    • pp.720-724
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    • 2016
  • Transparent n-type metal-oxide semiconductor of $MoO_x$ was applied on a p-type Si substrate for high-performing heterojunction photodetector. The formation of $MoO_x$ on Si spontaneously established a rectifying current flow with a high rectification ratio of 1,252.3%. Under light illumination condition, n-type $MoO_x$/p-type Si heterojunction device provided significantly fast responses (rise time : 61.28 ms, fall time : 66.26 ms). This transparent metal-oxide layer ($MoO_x$) would provide a functional route for various photoelectric devices, including photodetectors and solar cells.

P형 4H-SiC 기판에 형성된 ZnO 박막/나노선 가스 센서의 300℃에서 CO 가스 감지 특성 (CO Gas Sensing Characteristic of ZnO Thin Film/Nanowire Based on p-type 4H-SiC Substrate at 300℃)

  • 김익주;오병훈;이정호;구상모
    • 한국전기전자재료학회논문지
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    • 제25권2호
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    • pp.91-95
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    • 2012
  • ZnO thin films were deposited on p-type 4H-SiC substrate by pulsed laser deposition. ZnO nanowires were formed on p-type 4H-SiC substrate by furnace. Ti/Au electrodes were deposited on ZnO thin film/SiC and ZnO nanowire/SiC structures, respectively. Structural and crystallographical properties of the fabricated ZnO thin film/SiC and ZnO nanowire/SiC structures were investigated by field emission scanning electron microscope and X-ray diffraction. In this work, resistance and sensitivity of ZnO thin film/SiC gas sensor and ZnO nanowire/SiC gas sensor were measured at $300^{\circ}C$ with various CO gas concentrations (0%, 90%, 70%, and 50%). Resistance of gas sensor decreases at CO gas atmosphere. Sensitivity of ZnO nanowire/SiC gas sensor is twice as big as sensitivity of ZnO thin film/SiC gas sensor.

HIT Cell 최적화를 위한 AFORS HET 시뮬레이션 실행 (Operating AFORS HET Simulation for Optimize of HIT Cell)

  • 유호준
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.448-449
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    • 2008
  • HIT(Heterojunction with intrinsic thin layer) solar cell은 결정 실리콘 (c-Si)을 n-type으로 제작시 수율이 어렵고 결정 실리콘 (c-Si)을 p-type위에 제조하는 것이 보다 보편적인 방법이므로 베이스의 결정 실리콘에는 p-type을, 그 위에는 진성 층(intrinsic layer) 그리고 반투명 전극의 아래에 제조되는 비정질 실리콘 (a-Si)을 n-type으로 하여 베이스 층과 TCO 후면 층의 두께, 도핑 농도 (doping concentration)와의 관계를 확인하여 본다.

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TMAH/IPA/pyrazine 용액에서의 전기화학적 식각정지특성 (The characteristics of electrochemical etch-stop in THAH/IPA/pyrazine solution)

  • 정귀상;박진성
    • 센서학회지
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    • 제7권6호
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    • pp.426-431
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    • 1998
  • 본 논문에서는 THAH/IPA/pyrazine 용액에서의 전기화학적 식각정지특성을 기술한다. THAH/IPA/pyrazine 용액에서의 n-형과 p-형의 Si에 대한 I-V 곡선이 얻어졌다. p-형 Si에 대한 OCP(개방회로전압)과 PP(보호막생성 전압)은 각각 -1.2 V와 0.1 V이고, n-형에 대해서는 -1.3 V와 -0.2 V로 각각 나타났다. p-형과 n-형 Si 모두 PP점보다 양의 전압에서 식각율이 급속히 감소하였다. 또한 THAH/IPA/pyrazine 용액에서의 식각정지특성을 관찰하였다. pn 접합부에서의 정확한 식각정지에 의해서 epi. 층의 두께에 상응하는 Si 다이어프램을 제작할 수 있었다. 최적 이방성 식각조건인 TMAH 25 wt.%/IPA 17 vol.%/pyrazine 0.1g/100ml에서 식각률이 가장 높기 때문에 식각소요시간이 크게 감소하였다.

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SiGe-Si-SiGe 채널구조를 이용한 JFET 시뮬레이션 (Simulation of Junction Field Effect Transistor using SiGe-Si-SiGe Channel Structure)

  • 박병관;양하용;김택성;심규환
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.94-94
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    • 2008
  • We have performed simulation for Junction Field Effect Transistor(JFET) using Silvco to improve its electrical properties. The device structure and process conditions of Si-control JFET(Si-JFET) were determined to set its cut off voltage and drain current(at Vg=0V) to -0.5V and $300{\mu}A$, respectively. From electrical property obtained at various implantation energy, dose, and drive-in conditions of p-gate doping, we found that the drive in time of p-type gate was the most determinant factor due to severe diffusion. Therefore we newly designed SiGe-JFET, in which SiGe layer is to epitaxial layers placed above and underneath of the Si-channel. The presence of SiGe layer lessen the p-type dopants (Boron) into the n-type Si channel the phenomenon would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer will be discussed in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

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저온 공정에 의한 a-Si:H/c-Si 이종접합 태양전지 제조 및 동작특성 분석 (Process and Performance Analysis of a-Si:H/c-Si Hetero-junction Solar Sells Prepared by Low Temperature Processes)

  • 임충현;이정철;전상원;김상균;김석기;김동섭;양수미;강희복;이보영;송진수;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2005년도 춘계학술대회
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    • pp.196-200
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    • 2005
  • In this work, we investigated simple Aㅣ/TCO/a-Si:H(n)/c-Si(p)/Al hetero-junction solar cells prepared by low temperature processes, unlike conventional thermal diffused c-Si solar cells. a-Si:H/c-Si hetero-junction solar cells are processed by low temperature deposition of n-type hydrogenated amorphous silicon (a-Si:H) films by plasma-enhanced chemical vapor deposition on textured and flat p-type silicon substrate. A detailed investigation was carried out to acquire optimization and compatibility of amorphous layer, TCO (ZnO:Al) layer depositions by changing the plasma process parameters. As front TCO and back contact, ZnO:Al and AI were deposited by rf magnetron sputtering and e-beam evaporation, respectively. The photovoltaic conversion efficiency under AMI.5 and the quantum efficiency on $1cm^2$ sample have been reported. An efficiency of $12.5\%$ is achieved on hetero-structure solar cells based on p-type crystalline silicon.

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$SnO_2-Si $ 이중접합 태양전지의 특성개선 (The Improvement in Properties of $SnO_2-Si $ Heterojunction Solar Cells)

  • 이#한;송정섭
    • 대한전자공학회논문지
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    • 제17권6호
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    • pp.65-71
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    • 1980
  • SRO2-Si 이종접합 태양전지소자틀 진공증착에 의하여 제작하여 SRO2를 Si기판위에 증착후 실기중에서의 열처리(소둔)가 태양전지소자의 특성 특히 단락전류와 개방단자전압에 미치는 영향을 실험적으로 검토하여 이 열처리온도에 최적치가 있음을 알았다. 이 최적온도는 Si기액의 고유저항에 따라 차이가 있으며 고유저항이 비슷한 경우는 N형과 P형 Si 기판에 따르는 큰 차이는 없으나 같은 P형 Si기판인 경우에는 고유저항이 낮은 쪽의 최적온도가 높은 것으로 나타났다.

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열적 안정한 압력센서 제작을 위한 보론(B) 이온 주입 n형 Si 에피 전극 연구 (A Study of B-implanted n Type Si Epi Resistor for the Fabrication of Thermal Stable Pressure Sensor)

  • 최경근;강문식
    • 센서학회지
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    • 제27권1호
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    • pp.40-46
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    • 2018
  • In this paper, we focus on optimization of a boron ($^{11}B$)-implanted n type Si epi substrate for obtaining near-zero temperature coefficient of resistance (TCR) at temperature range from 25 to $125^{\circ}C$. The $^{11}B$-implantation on the N type-Si epi substrate formed isolation from the rest of the N-type Si by the depletion region of a PN junction. The TCR increased as the temperature of rapid thermal anneal (RTA) was increased at the temperature range from $900^{\circ}C$ to $1000^{\circ}C$ for the $p^+$ contact with implantation at dose of $1E16/cm^2$, but sheet resistance of this film was decreased. After the optimization of anneal process condition, the TCR of $1126.7{\pm}30.3$ (ppm/K) was obtained for the $p^-$ resistor-COB package chips contained $p^+$ contact with the implantation of $5E14/cm^2$. This shows the potential of the $^{11}B$-implanted n type Si epi substrate as a resistor for pressure sensor in thermal stable environment applications..