• Title/Summary/Keyword: p-multiplier

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Automatic tune parameter for digital PID controller based on FPGA

  • Tipsuwanporn, V.;Jitnaknan, P.;Gulpanich, S.;Numsomran, A.;Runghimmawan, T.
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1012-1015
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    • 2003
  • Recently technologies have created new principle and theory but the PID control system remains its popularity as the PID controller contains simple structure, including maintenance and parameter adjustment being so simple. The adjust parameter of PID to achieve best response of process which be using time and may be error if user are not expert. Nowadays this problem was solved by develop PID controller which can analysis and auto tune parameter are appropriate with process which used principle of Ziegler ? Nichols but it are expensive and designed for each task. Thus, this paper proposes auto tune PID based on FPGA by use principle of Dahlin which maximum overshoot not over 5 percentages and do not fine tuning again. It have performance in control process are neighboring controller in industrial and simple to use. Especially, It can use various process and low price. The auto tune digital PID processor embedded on chip FPGA XC2S50-5tq-144. The digital PID processor was designed by fundamental PID equation which architectures including multiplier, adder, subtracter and some other logic gate. It was verified by control model of temperature control system.

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Evaluation of Particle Size Effect on Dynamic Behavior of Soil-pile System (모래 지반의 입자크기가 지반-말뚝 시스템의 동적 거동에 미치는 영향 평가)

  • Yoo, Min-Taek;Yang, Eui-Kyu;Han, Jin-Tae;Kim, Myoung-Mo
    • Proceedings of the Korean Geotechical Society Conference
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    • 2010.03a
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    • pp.188-197
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    • 2010
  • This paper presents experimental results of a series of 1-g shaking table model tests performed on end-bearing single piles and pile groups to investigate the effect of particle size on the dynamic behavior of soil-pile systems. Two soil-pile models consisting of a single-pile and a $4{\times}2$-pile group were tested twice; first using Jumoonjin sand, and second using Australian Fine sand, which has a smaller particle size. In the case of single-pile models, the lateral displacement was almost within 1% of pile diameter which corresponds to the elastic range of the pile. The back-calculated p-y curves show that the subgrade reaction of the Jumoonjin-sand-model ground was larger than that of the Australian Fine-sand-model ground at the same displacement. This phenomenon means that the stress-strain behavior of Jumoonjin sand was initially stiffer than that of Australian Fine sand. This difference was also confirmed by resonant column tests and compression triaxial tests. And the single pile p-y backbone curves of the Australian fine sand were constructed and compared with those of the Jumoonjin sand. As a result, the stiffness of the p-y backbone curves of Jumunjin sand was larger than those of Australian fine sand. Therefore, using the same p-y curves regardless of particle size can lead to inaccurate results when evaluating dynamic behavior of soil-pile system. In the case of the group-pile models, the lateral displacement was much larger than the elastic range of pile movement at the same test conditions in the single-pile models. The back-calculated p-y curves in the case of group pile models were very similar in both sands because the stiffness difference between the Jumoonjin-sand-model ground and the Australian Fine-sand-model ground was not significantly large at a large strain level, where both sands showed non-linear behavior. According to a series of single pile and group pile test results, the evaluation group pile effect using the p-multiplier can lead to inaccurate results on dynamic behavior of soil-pile system.

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Fuzzy Logic PID controller based on FPGA

  • Tipsuwanporn, V.;Runghimmawan, T.;Krongratana, V.;Suesut, T.;Jitnaknan, P.
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1066-1070
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    • 2003
  • Recently technologies have created new principle and theory but the PID control system remains its popularity as the PID controller contains simple structure, including maintenance and parameter adjustment being so simple. Thus, this paper proposes auto tune PID by fuzzy logic controller based on FPGA which to achieve real time and small size circuit board. The digital PID controller design to consist of analog to digital converter which use chip TDA8763AM/3 (10 bit high-speed low power ADC), digital to analog converter which use two chip DAC08 (8 bit digital to analog converters) and fuzzy logic tune digital PID processor embedded on chip FPGA XC2S50-5tq-144. The digital PID processor was designed by fundamental PID equation which architectures including multiplier, adder, subtracter and some other logic gate. The fuzzy logic tune digital PID was designed by look up table (LUT) method which data storage into ROM refer from trial and error process. The digital PID processor verified behavior by the application program ModelSimXE. The result of simulation when input is units step and vary controller gain ($K_p$, $K_i$ and $K_d$) are similarity with theory of PID and maximum execution time is 150 ns/action at frequency are 30 MHz. The fuzzy logic tune digital PID controller based on FPGA was verified by control model of level control system which can control level into model are correctly and rapidly. Finally, this design use small size circuit board and very faster than computer and microcontroller.

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Comparative Study of Automatic Trading and Buy-and-Hold in the S&P 500 Index Using a Volatility Breakout Strategy (변동성 돌파 전략을 사용한 S&P 500 지수의 자동 거래와 매수 및 보유 비교 연구)

  • Sunghyuck Hong
    • Journal of Internet of Things and Convergence
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    • v.9 no.6
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    • pp.57-62
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    • 2023
  • This research is a comparative analysis of the U.S. S&P 500 index using the volatility breakout strategy against the Buy and Hold approach. The volatility breakout strategy is a trading method that exploits price movements after periods of relative market stability or concentration. Specifically, it is observed that large price movements tend to occur more frequently after periods of low volatility. When a stock moves within a narrow price range for a while and then suddenly rises or falls, it is expected to continue moving in that direction. To capitalize on these movements, traders adopt the volatility breakout strategy. The 'k' value is used as a multiplier applied to a measure of recent market volatility. One method of measuring volatility is the Average True Range (ATR), which represents the difference between the highest and lowest prices of recent trading days. The 'k' value plays a crucial role for traders in setting their trade threshold. This study calculated the 'k' value at a general level and compared its returns with the Buy and Hold strategy, finding that algorithmic trading using the volatility breakout strategy achieved slightly higher returns. In the future, we plan to present simulation results for maximizing returns by determining the optimal 'k' value for automated trading of the S&P 500 index using artificial intelligence deep learning techniques.

On the use of the Lagrange Multiplier Technique for the unilateral local buckling of point-restrained plates, with application to side-plated concrete beams in structural retrofit

  • Hedayati, P.;Azhari, M.;Shahidi, A.R.;Bradford, M.A.
    • Structural Engineering and Mechanics
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    • v.26 no.6
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    • pp.673-685
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    • 2007
  • Reinforced concrete beams can be strengthened in a structural retrofit process by attaching steel plates to their sides by bolting. Whilst bolting produces a confident degree of shear connection under conditions of either static or seismic overload, the plates are susceptible to local buckling. The aim of this paper is to investigate the local buckling of unilaterally-restrained plates with point supports in a generic fashion, but with particular emphasis on the provision of the restraints by bolts, and on the geometric configuration of these bolts on the buckling loads. A numerical procedure, which is based on the Rayleigh-Ritz method in conjunction with the technique of Lagrange multipliers, is developed to study the unilateral local buckling of rectangular plates bolted to the concrete with various arrangements of the pattern of bolting. A sufficient number of separable polynomials are used to define the flexural buckling displacements, while the restraint condition is modelled as a tensionless foundation using a penalty function approach to this form of mathematical contact problem. The additional constraint provided by the bolts is also modelled using Lagrange multipliers, providing an efficacious method of numerical analysis. Local buckling coefficients are determined for a range of bolting configurations, and these are compared with those developed elsewhere with simplifying assumptions. The interaction of the actions in bolted plates during buckling is also considered.

Efficient Rate Control by Lagrange Multiplier Using Adaptive Mode Selection in Video Coding (비디오 코팅시 Lagrage 승수를 조정하여 적응 모드 선택에 따른 비트율의 제어)

  • Ryu, Chul;Kim, Seung P.
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.1B
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    • pp.77-88
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    • 2000
  • This paper presents an approach for rate control by adaptively selecting macroblock modes in video coding.The problem of rate control has been investigated by many authors where quantizer level is adjustedbased on the buffer fullness. The proposed approach is different fron the previous ones [4] id that it finds the optimal decision curve rather than finding a set of the modes. Proposed algorithm extends the coding decision options for rate control to motion/no-motion compensation as well as inter/intra decisions. Instead of having a fixed motion/no-notion compensation or inter/intra decision curve, one can utilize an adaptive decision curvebased on the characteristics of input frames so that the PSNR at a given bit rate is maximized. Therefore, the proposed approach provides better rate control than simple quantizer feedback approach interns of visual quality. The curve is obtained by utilizing simulated annealing optimization technique. Thealgorithm is implemented and simulations are compared with other approaches within H.261 video codec.

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The New Generation Circulation Method to Generalized Reed-Muller(GRM) Coefficients over GF(3) (극수의 순환성을 이용한 새로운 GF(3)상의 GRM 상수 생성 방법)

  • Lee, Chol-U;Che, Wenzhe;Kim, Heung-Soo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.10 s.340
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    • pp.17-24
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    • 2005
  • This paper propose a new generation method of GRM coefficients using the circulation property of polarity over GF(3). The general method to derive GRM coefficients are obtain the filled polarity of GRM coefficients using RM expansion and expand it for the polarities. Since the general method has many operations when the number of the variables are incremented. Proposed method in this paper simplifies the generation procedure and reduces a number of operators compare to parallel type because of the cyclic property of polarity. Comparing to the proposed papers, the proposed method use only adders without multiplier. So it improves the complexity of the system with efficient composition of the circuits.

초고에너지 우주선과 고층대기 극한방전 현상 관측을 위한 TUS(Tracking Ultraviolet Setup) 및 Pinhole Camera 개발 및 진행상황

  • Kim, Min-Bin;Kim, Ji-Eun;Kim, Ye-Won;Na, Go-Un;Park, Il-Heung;Seo, Jeong-Eun;Lee, Jik;Jeong, Ae-Ra;Garipov, G.;Khrenov, B.;Klimov, P.;Panasyuk, M.
    • The Bulletin of The Korean Astronomical Society
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    • v.37 no.2
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    • pp.209.1-209.1
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    • 2012
  • TUS(Tracking Ultraviolet Setup)는 5x1019 eV 이상의 초고에너지 우주선의 스펙트럼과 그 기원, 그리고 고층대기 극한방전 현상(TLE) 관측을 위한 우주망원경이다. 위성 Lomonosov의 탑재체로 2013년에 발사예정에 있으며 지구로부터 550km 상공에서 지구를 돌며 3년 이상 임무를 수행할 예정이다. TUS는 크게 반사경과 Detector Module 두 부분으로 나뉜다. 7개의 육각형 프레넬 거울을 이용한 $2m^2$ 크기의 반사경과 256개의 PMT(Photo Multiplier Tube)로 구성된 Detector Module을 이용하여 지구 대기에서 초고에너지 우주선에 의해 발생하는 UV fluorescence와 Cherenkov light를 관측한다. TUS Detector Module의 한 부분인 Pinhole Camera는 본 연구단의 기술로 직접 개발한 탑재체로서 TUS 반사경을 통하지 않고 두개의 $8{\times}8$ 어레이 MAPMT (Multi Anode PMT)가 직접 지구를 바라보며 고층대기 극한방전 현상을 관측한다. Pinhole camera는 TUS의 시야각을 포괄하는 넓은 시야각을 가지고 있으며 빠른 트리거 시스템으로 고층대기 극한 방전 현상을 관측하며, 이 방전현상과 TUS가 관측하는 초고에너지 우주선과의 상관 관계를 연구한다. 현재 TUS 및 Pinhole Camera는 러시아에서 조립되어 우주환경 인증 시험 및 인터페이스 테스트가 진행되고 있다. 본 발표에서는 TUS와 Pinhole Camera를 소개하고 현재까지의 진행상황 및 테스트 결과에 대해 보고하고자 한다.

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Design of Dual Band Wireless LAN Transmitter Using DGS (DGS를 이용한 이중대역 무선 랜 송신부 설계)

  • Kang Sung-Min;Choi Jae-Hong;Koo Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.4 s.346
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    • pp.75-80
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    • 2006
  • This paper has proposed a novel dual band transmitter module which can be operating either as an amplifier or as a frequency multiplier according to the input frequency. A conventional dual band transmitter consists of separate amplifiers operating at each frequency band, but the proposed dual band module operates as an amplifier for the IEEE 802.11b/g signal, and as a frequency doubler for the IEEE 802.11a signal according to input frequency and bias voltage. In this paper, we have obtained sharp stop band characteristics by using microstrip DGS(Defected Ground Structure) to suppress the fundamental frequency of the frequency doubler as well as the second harmonic of the amplifier. From measurement result, second harmonic suppression is below -59dBc in the amplifier mode, and fundamental suppression is below -35dBc in the frequency doubler mode. And the designed module has 17.8dBm output P1dB at 2.4GHz and 10.1dBm power for 5.8GHz output, and the output power in the two modes are 0.8dB and 2.8dB larger than the module with ${\lambda}g/4$ reflector, respectively.

An FPGA Implementation of the Synthesis Filter for MPEG-1 Audio Layer III by a Distributed Arithmetic Lookup Table (분산산술연산방식을 이용한 MPEG-1 오디오 계층 3 합성필터의 FPGA 군현)

  • Koh Sung-Shik;Choi Hyun-Yong;Kim Jong-Bin;Ku Dae-Sung
    • The Journal of the Acoustical Society of Korea
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    • v.23 no.8
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    • pp.554-561
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    • 2004
  • As the technologies of semiconductor and multimedia communication have been improved. the high-quality video and the multi-channel audio have been highlighted. MPEG Audio Layer 3 decoder has been implemented as a Processor using a standard. Since the synthesis filter of MPEG-1 Audio Layer 3 decoder requires the most outstanding operation in the entire decoder. the synthesis filter that can reduce the amount of operation is needed for the design of the high-speed processor. Therefore, in this paper, the synthesis filter. the most important part of MPEG Audio, is materialized in FPGA using the method of DAULT (distributed arithemetic look-up table). For the design of high-speed synthesis filter, the DAULT method is used instead of a multiplier and a Pipeline structure is used. The Performance improvement by 30% is obtained by additionally making the result of multiplication of data with cosine function into the table. All hardware design of this Paper are described using VHDL (VHIC Hardware Description Language) Active-HDL 6.1 of ALDEC is used for VHDL simulation and Synplify Pro 7.2V is used for Model-sim and synthesis. The corresponding library is materialized by XC4013E and XC4020EX. XC4052XL of XILINX and XACT M1.4 is used for P&R tool. The materialized processor operates from 20MHz to 70MHz.