• Title/Summary/Keyword: p-FET

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Wireless Telemetry System for the FET-type Ion Sensors (FET형 이온센서용 무선원격측정시스템)

  • Jeong, H.;Choi, B.D.;Kim, Y.J.;Lee, Y.C.;Sohn, B.K.
    • Journal of Sensor Science and Technology
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    • v.10 no.3
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    • pp.187-195
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    • 2001
  • A wireless telemetry measurement system, using ISFETs, was developed for environmental monitoring applications, industrial processes, medical treatments and so on. This system is composed of the measurement part located at remote site and a personal computer(PC) which control whole instrument process. The measurement part transmits measured data to the PC by RF transceiver, and transmitted data are analyzed and handled in the PC. Proposed system utilizing time division multiplexing for the transmission of 3channel ISFET signal. The measurement part has an identification number(ID) so that the PC controls many measurement parts separately. Experiments were performed using pH-ISFETs, and the implemented system operates well within designed specification and accuracy of 0.1 pH.

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Gate-Controlled Spin-Orbit Interaction Parameter in a GaSb Two-Dimensional Hole gas Structure

  • Park, Youn Ho;Koo, Hyun Cheol;Shin, Sang-Hoon;Song, Jin Dong;Kim, Hyung-Jun;Chang, Joonyeon;Han, Suk Hee;Choi, Heon-Jin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.382-383
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    • 2013
  • Gate-controlled spin-orbit interaction parameter is a key factor for developing spin-Field Effect Transistor (Spin-FET) in a quantum well structure because the strength of the spin-orbit interaction parameter decides the spin precession angle [1]. Many researches show the control of spin-orbit interaction parameter in n-type quantum channels, however, for the complementary logic device p-type quantum channel should be also necessary. We have calculated the spin-orbit interaction parameter and the effective mass using the Shubnikov-de Haas (SdH) oscillation measurement in a GaSb two-dimensional hole gas (2DHG) structure as shown in Fig 1. The inset illustrates the device geometry. The spin-orbit interaction parameter of $1.71{\times}10^{11}$ eVm and effective mass of 0.98 $m^0$ are obtained at T=1.8 K, respectively. Fig. 2 shows the gate dependence of the spin-orbit interaction parameter and the hole concentration at 1.8 K, which indicates the spin-orbit interaction parameter increases with the carrier concentration in p-type channel. On the order hand, opposite gate dependence was found in n-type channel [1,2]. Therefore, the combined device of p- and n-type channel spin transistor would be a good candidate for the complimentary logic device.

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알칼리성 슬러리를 이용한 단결정 및 다결정 실리콘의 화학적 기계적 연마 특성 평가

  • Kim, Hyeok-Min;Gwon, Tae-Yeong;Jo, Byeong-Jun;Venkatesh, R. Prasanna;Park, Jin-Gu
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.10a
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    • pp.24.1-24.1
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    • 2011
  • CMP (Chemical Mechanical Planarization)는 고직접도의 다층구조의 소자를 형성하기 위한 표면연마 공정으로 사용되며, pattern 크기의 감소에 따른 공정 중요도는 증가하고 있다. 반도체 소자 제조 공정에서는 낮은 비용으로 초기재료를 만들 수 있고 우수한 성능의 전기 절연성질을 가지는 산화막을 만들 수 있는 단결정 실리콘 웨이퍼가 주 재료로 사용되고 있으며, 반도체 공정에서 실리콘 웨이퍼 표면의 거칠기는 후속공정에 매우 큰 영향을 미치므로 CMP 공정을 이용한 평탄화 공정이 필수적이다. 다결정 실리콘 박막은 현재 IC, RCAT (Recess Channel Array Transistor), 3차원 FinFET 제조 공정에서 사용되며 CMP공정을 이용한 표면 거칠기의 최소화에 대한 연구의 필요성이 요구되고 있다. 본 연구에서는 알칼리성 슬러리를 이용한 단결정 및 다결정 실리콘의 식각 및 연마거동에 대한 특성평가를 실시하였다. 화학적 기계적 연마공정에서 슬러리의 pH는 슬러리의 분산성, removal rate 등 결과에 큰 영향을 미치고 연마대상에 따라 pH의 최적조건이 달라지게 된다. 따라서 단결정 및 다결정 실리콘 연마공정의 최적 조건을 확립하기 위해 static etch rate, dynamic etch rate을 측정하였으며 연마공정상의 friction force 및 pad의 온도변화를 관찰한 후 removal rate을 계산하였다. 실험 결과, 단결정 실리콘은 다결정 실리콘보다 static/dynamic etch rate과 removal rate이 높은 것으로 나타났으며 슬러리의 pH에 따른 removal rate의 증가율은 다결정 실리콘이 더 높은 것으로 관찰되었다. 또한 다결정 실리콘 연마공정에서는 friction force 및 pad의 온도가 단결정 실리콘 연마공정에 비해 상대적으로 더 높은 것으로 나타났다. 결과적으로 단결정 실리콘의 연마 공정에서는 화학적 기계적인 거동이 복합적으로 작용하지만 다결정 실리콘의 경우 슬러리를 통한 화학적인 영향보다는 공정변수에 따른 기계적인 영향이 재료 연마율에 큰 영향을 미치는 것으로 확인되었으며, 이를 통한 최적화된 공정개발이 가능할 것으로 예상된다.

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Live birth outcomes of vitrified embryos generated under growth hormone stimulation are improved for women categorized as poor-prognosis

  • Keane, Kevin N;Ye, Yun;Hinchliffe, Peter M;Regan, Sheena LP;Dhaliwal, Satvinder S;Yovich, John L
    • Clinical and Experimental Reproductive Medicine
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    • v.46 no.4
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    • pp.178-188
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    • 2019
  • Objective: To determine the clinical pregnancy (CP) and live birth (LB) rates arising from frozen embryo transfers (FETs) that had been generated under the influence of in vitro fertilization (IVF) adjuvants given to women categorized as poor-prognosis. Methods: A registered, single-center, retrospective study. A total of 1,119 patients with first FETs cycle include 310 patients with poor prognosis (109 treated with growth hormone [GH], (+)GH group vs. 201 treated with dehydroepiandrosterone, (-)GH group) and 809 patients with good prognosis (as control, (-)Adj (Good) group). Results: The poor-prognosis women were significantly older, with a lower ovarian reserve than the (-)Adj (Good) group, and demonstrated lower chances of CP (p< 0.005) and LB (p< 0.005). After adjusting for confounders, the chances of both CP and LB in the (+)GH group were not significantly different from those in the (-)Adj (Good) group, indicating that the poor-prognosis patients given GH had similar outcomes to those with a good prognosis. Furthermore, the likelihood of LB was significantly higher for poor-prognosis women given GH than for those who did not receive GH (p< 0.028). This was further confirmed in age-matched analyses. Conclusion: The embryos cryopreserved from fresh IVF cycles in which adjuvant GH had been administered to women classified as poor-prognosis showed a significant 2.7-fold higher LB rate in subsequent FET cycles than a matched poor-prognosis group. The women with a poor prognosis who were treated with GH had LB outcomes equivalent to those with a good prognosis. We therefore postulate that GH improves some aspect of oocyte quality that confers improved competency for implantation.

High Isolation and Linearity MMIC SPDT Switch for Dual Band Wireless LAN Applications (이중대역 무선랜 응용을 위한 높은 격리도와 선형성을 갖는 MMIC SPDT 스위치)

  • Lee, Kang-Ho;Koo, Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.1 s.343
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    • pp.143-148
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    • 2006
  • This paper presents a high isolation and power-handling single-pole double-throw(SPDT) switch for dual band wireless LAN applications. The switch circuit has asymmetric topology which uses stacked-gate to have high power-handling and isolation for the Tx path. The proposed SPDT switch has been designed with optimum gate-width, bias, and number of stacked-gate FET. This SPDT switch has been implemented with $0.25{\mu}m$ GaAs pHEMT process which has Gmmax of 500mS/mm and fmax of 150GHz. The designed SPDT switch has the measured insertion loss of better than 0.9dB and isolation of better than 40dB for the Tx path and 25dB for the Rx path and the high power handling capability with PldB of about 23dBm for control voltage of -3/0V. The fabricated SPDT switch chip size is $1.8mm{\times}1.8mm$.

Transparent and Flexible All-Organic Multi-Functional Sensing Devices Based on Field-effect Transistor Structure

  • Trung, Tran Quang;Tien, Nguyen Thanh;Seol, Young-Gug;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.491-491
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    • 2011
  • Transparent and flexible electronic devices that are light-weight, unbreakable, low power consumption, optically transparent, and mechanical flexible possibly have great potential in new applications of digital gadgets. Potential applications include transparent displays, heads-up display, sensor, and artificial skin. Recent reports on transparent and flexible field-effect transistors (tf-FETs) have focused on improving mechanical properties, optical transmittance, and performances. Most of tf-FET devices were fabricated with transparent oxide semiconductors which mechanical flexibility is limited. And, there have been no reports of transparent and flexible all-organic tf-FETs fabricated with organic semiconductor channel, gate dielectric, gate electrode, source/drain electrode, and encapsulation for sensor applications. We present the first demonstration of transparent, flexible all-organic sensor based on multifunctional organic FETs with organic semiconductor channel, gate dielectric, and electrodes having a capability of sensing infrared (IR) radiation and mechanical strain. The key component of our device design is to integrate the poly(vinylidene fluoride-triflouroethylene) (P(VDF-TrFE) co-polymer directly into transparent and flexible OFETs as a multi-functional dielectric layer, which has both piezoelectric and pyroelectric properties. The P(VDF-TrFE) co-polumer gate dielectric has a high sensitivity to the wavelength regime over 800 nm. In particular, wavelength variations of P(VDF-TrFE) molecules coincide with wavelength range of IR radiation from human body (7000 nm ~14000 nm) so that the devices are highly sensitive with IR radiation of human body. Devices were examined by measuring IR light response at different powers. After that, we continued to measure IR response under various bending radius. AC (alternating current) gate biasing method was used to separate the response of direct pyroelectric gate dielectric and other electrical parameters such as mobility, capacitance, and contact resistance. Experiment results demonstrate that the tf-OTFT with high sensitivity to IR radiation can be applied for IR sensors.

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Design of Variable Gain Receiver Front-end with Wide Gain Variable Range and Low Power Consumption for 5.25 GHz (5.25 GHz에서 넓은 이득 제어 범위를 갖는 저전력 가변 이득 프론트-엔드 설계)

  • Ahn, Young-Bin;Jeong, Ji-Chai
    • Journal of IKEEE
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    • v.14 no.4
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    • pp.257-262
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    • 2010
  • We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

Investigation of characteristic on Solution-Processed Al-Zn-Sn-O Pseudo Metal-Oxide-Semiconductor Field-Effect-Transistor using microwave annealing

  • Kim, Seung-Tae;Mun, Seong-Wan;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.206.2-206.2
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    • 2015
  • 최근 비정질 산화물 반도체 thin film transistor(TFT)는 차세대 투명 디스플레이로 많은 관심을 받고 있으며 활발한 연구가 진행되고 있다. 산화물 반도체 TFT는 기존의 비정질 실리콘 반도체에 비하여 큰 on/off 전류비, 높은 이동도 그리고 낮은 구동전압으로 인하여 차세대 투명 디스플레이 산업에 적용 가능하다는 장점이 있다. 한편 기존의 sputter나 evaporator를 이용한 증착 방식은 우수한 막의 특성에도 불구하고 많은 시간과 제작비용이 든다는 단점을 가지고 있다. 따라서 본 연구에서는 별도의 고진공 시스템이 필요하지 않을 뿐만 아니라 대면적화에도 유리한 용액공정 방식을 이용하여 박막 트렌지스터를 제작하였으며 thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화 하였다. 제작된 박막 트렌지스터는 p-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 spin coater을 이용하여 Al-Zn-Sn-O 박막을 형성하였다. 연속해서 photolithography 공정과 BOE (30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 Pseudo-MOS FET구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성평가가 용이하다는 장점을 가지고 있다. 그 결과, microwave를 통해 열처리한 소자는 100oC 이하의 낮은 열처리 온도에도 불구하고 furnace를 이용하여 열처리한 소자와 비교하여 subthreshold swing(SS), Ion/off ratio, field-effectmobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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Experiment of Graphene Etching by Using $O_2$ Plasma Ashing ($O_2$ plasma ashing을 이용한 그라핀 식각 실험)

  • Oh, Se-Man;Kim, Eun-Ho;Park, Jae-Min;Cho, Won-Ju;Jung, Jong-Wan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.424-424
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    • 2009
  • 그라핀은 밴드갭이 없어서 세미메탈의 성질을 띠므로 초고속 RF 소자에는 응용이 가능하지만, 현재 사용되는 반도체 칩에 사용하기가 불가능하다. 그러나 그라핀을 매우 좁은 리본 형태로 만들 경우 밴드갭이 생기고 이에 따라 반도체특성을 뛰게 된다. 이러한 특성은 시뮬레이션을 통해서만 이해되다가 2007년 P. Kim이 그라핀 나노리본의 밴드캡이 리본의 폭이 좁아짐에 따라 증가함을 실험적으로 최초로 발표하였다. 하지만 그라핀을 나노리본형태로 식각 방법에 대해서는 정확히 연구되지 않았다. 따라서 본 연구에서는 $O_2$ plasma ashing 방법을 이용하여 그라핀을 식각하는 방법에 대해 연구하였다. 먼저 Si기판을 initial cleaning 한 후, highly-oriented pyrolytic graphite(HOPG)를 이용하여 기존의 mechanical exfoliation 방식을 통해 그라핀을 형성하였다. Photo-lithography 방법을 통하여 패터닝한 후, 그라핀을 식각하기 위하여 Reactive Ion Etcher (RIE) system을 이용한 $O_2$ plasma ashing을 50 W에서 1 분간 실시하였다. 다시 image reverse photo-lithography 과정과 E-beam evaporator system를 통해서 Al 전극을 형성하여 graphene-FET를 제작하였고, 광학 현미경과 AFM (Atomic force microscope)을 통해 두께를 확인하였다. 본 연구를 통하여 $O_2$ plasma ashing을 이용하여 쉽게 그라 E을 식각할 수 있음을 확인 하였으며, 제작된 소자의 전기적 특성에 대해서 현재 실험중에 있다.

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Highly Efficient AC-DC Converter for Small Wind Power Generators

  • Ryu, Hyung-Min
    • Journal of Power Electronics
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    • v.11 no.2
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    • pp.188-193
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    • 2011
  • A highly efficient AC-DC converter for small wind power generation systems using a brushless DC generator (BLDCG) is presented in this paper. The market standard AC-DC converter for a BLDCG consists of a three-phase diode rectifier and a boost DC-DC converter, which has an IGBT and a fast recovery diode (FRD). This kind of two-stage solution basically suffers from a large amount of conduction loss and the efficiency greatly decreases under a light load, or at a low current, because of the switching devices with a P-N junction. In order to overcome this low efficiency, especially at a low current, a three-phase bridgcless converter consisting of three upper side FRDs and three lower side Super Junction FETs is presented. In the overall operating speed region, including the cut-in speed, the efficiency of the proposed converter is improved by up to 99%. Such a remarkable result is validated and compared with conventional solutions by calculating the power loss based on I-V curves and the switching loss data of the adopted commercial switches and the current waveforms obtained through PSIM simulations.