• Title/Summary/Keyword: p+/n junction

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Application of Ceramic Oxides to Low-voltage Varistor (산화물 세라믹스의 미소전압용 바리스터에 대한 응용)

  • Kang, D.H.;Kim, Y.H.;Park, Y.D.
    • Journal of Power System Engineering
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    • v.4 no.4
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    • pp.99-107
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    • 2000
  • In this study several P type and N type ceramic semiconductors were prepared by atomic valence control and their electric resistivities were investigated with various concentrations of additive impurities. N-P junctions were made by thin film printing method and their varistor-like characteristics were investigated and their availability was discussed. The results are followings, 1) Some N type semiconductors with a proper concentration of additive impurity have minimum resistivities. 2) The N-P junction samples with ZnO as a constituent material of N type semiconductor have linearity in voltage-current characteristics, but the other N-P junction samples have the non-linearity, 3) Some N-P junction samples showed the good varistor-like characteristics.

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The defect nature and electrical properties of the electron irradiated $p^+-n^-$ junction diode (전자 조사된 $p^+-n^-$ 접합 다이오드의 결함 특성과 전기적 성질)

  • 엄태종;강승모;김현우;조중열;김계령;이종무
    • Journal of the Korean Vacuum Society
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    • v.13 no.1
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    • pp.14-21
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    • 2004
  • It is essential to increase the switching speed of power devices to reduce the energy loss because high frequency is commonly used in power device operation these days. In this work electron irradiation has been conducted to reduce the lifetime of minority carriers and thereby to increase the switching speed of a$p^+- n^-$ junction diode. Effects of electron irradiation on the electrical properties of the diode are reported The switching speed is effectively increased. Also the junction leakages and the forward voltage drop which are anticipated to increase are found to be negligible in the $p^+- n^-$ junction diodes irradiated with the optimum energy and dose. The analysis results of DLTS and C-V profiling indicate that the defects induced by electron irradiation in the silicon substrate are donor-like ones which have the energy levels of 0.284 eV and 0.483 eV. Considering all the experimental results in this study, it might be concluded that electron irradiation is a very useful technique in improving the switching speed and thereby reducing the energy loss of $p^+- n^-$ junction diode power devices.

The Electrical Roperties of TiN/$TiSi_2$ Bilayer Formed by Rapid Thermal Anneal at Submicron Contact (급속열처리에 의한 TiN/$TiSi_2$ 이중구조막을 이용한 submicron contact에서의 전기적 특성)

  • 이철진;성만영;성영권
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.9
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    • pp.78-88
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    • 1994
  • The electrical properties of TiM/TiSi$_{2}$ bilayer formed by rapid thermal anneal in NH$_{3}$ ambient after the Ti film is deposited on silicon cubstrate are investigated. N$^{+}$ contact resistance slightly increases with increasing annealing temperature with P$^{+}$ contact resistance decreases. The contact resistance of N$^{+}$ contance was less than 24[.OMEGA.] but P$^{+}$ thatn that of N$^{+}$ contact but the leakage current indicates degradation of the contact at high annealing temperature for both N$^{+}$ and contacts. The leakage current of N$^{+}$ Junction was less than 0.06[fA/${\mu}m^{2}$] but P$^{+}$ contact was 0.11-0.15[fA/${\mu}m^{2}$]. The junction breakdown voltage for N$^{+}$ junction remains contant with increasing annealing temperature while P$^{+}$ junction slightly decreases. The Electrical properties of a two step annealing are better than that of one step annealing. The Tin/TiSi$_{2}$ bilayer formed by RTA in NH$_{3}$ ambient reveals good electrical properties to be applicable at ULSI contact.

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Silicon thin film and p-n junction diode made by $CO_2$ laser-induced CVD method ($CO_2$ Laser-induced CVD법에 의한 Silicon박막 및 p-n 접합 Silicon제작)

  • Choi, H.K.;Jeong, K.;Kim, U.
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.662-666
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    • 1989
  • Pure mono Silane(Purity: 99.99%) was used as a thin film source and [$SiH_4$ + $H_2$ (5%)] + [$PH_3$ + $H_2$(0.05%)] mixed dilute gas was used for p-n junction diode. The substrate was P-type silicon wafer (p=$3{\Omega}$ cm) with the direction (100). The crystalline qualities of deposited thin film were investigated by the X-ray diffraction, RHEED and TED patterns and the voltampere characteristics of p-n junction diode was identified by I-V curve.

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Disposable Solid-State pH Sensor Using Nanoporous Platinum and Copolyelectrolytic Junction

  • Noh, Jong-Min;Park, Se-Jin;Kim, Hee-Chan;Chung, Taek-Dong
    • Bulletin of the Korean Chemical Society
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    • v.31 no.11
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    • pp.3128-3132
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    • 2010
  • A disposable solid-state pH sensor was realized by utilizing two nanoporous Pt (npPt) electrodes and a copolyelectrolytic junction. One nanoporous Pt electrode was to measure the pH as an indicating electrode (pH-IE) and the other assembled with copolyelectrolytic junction was to maintain constant open circuit potential ($E_{oc}$) as a solid-state reference electrode (SSRE). The copolyelectrolytic junction was composed of cationic and anionic polymers immobilized by photo-polymerization of N,N'-methylenebisacrylamide, making buffered electrolytic environment on the SSRE. It was expected to make. The nanoporous Pt surrounded by a constant pH excellently worked as a solid state reference electrode so as to stabilize the system within 30 s and retain the electrochemical environment regardless of unknown sample solutions. Combination between the SSRE and the pH-IE commonly based on nanoporous Pt yielded a complete solid-state pH sensor that requires no internal filling solution. The solid state pH sensing chip is simple and easy to fabricate so that it could be practically used for disposable purposes. Moreover, the solid-state pH sensor successfully functions in calibration-free mode in a variety of buffers and surfactant samples.

Physics and current density-voltage characteristics of $a-Si_{1-x}Ge_x:H$ alloy p-i-n solar cells ($a-Si_{1-x}Ge_x:H$ 화합물(化合物) p-i-n 태양전지(太陽電池)의 물리(物理) 및 전류밀도(電流密度)-전압(電壓) 특성(特性))

  • Kwon, Young-Shik
    • Proceedings of the KIEE Conference
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    • 1994.07b
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    • pp.1435-1438
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    • 1994
  • The effects of Ge composition variation in $a-Si_{1-x}Ge_x:H$ alloy p-i-n solar cells on the physical properties and current density-voltage characteristics are analyzed by a new simulation modelling based on the update published experimental datas. The simulation modelling includes newly formulated density of gap density spectrum corresponding to Ge composition variation and utilizes the newly derived generation rate formulars which include the reflection coefficients and can apply to multijunction structures as well as single junction structure. The effects in $a-Si_{1-x}Ge_x:H$ single junction are analyzed through the efficiency, fill factor, open circuit voltage, short circuit current density, free carriers, trap carriers, electric field, generation rate and recombination rate. Based on the results analyzed in single junction structure, the applications to multiple junction structures are discussed and the optimal conditions reaching to a high performance are investigated.

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Fabrication of Graphene p-n Junction Field Effect Transistors on Patterned Self-Assembled Monolayers/Substrate

  • Cho, Jumi;Jung, Daesung;Kim, Yooseok;Song, Wooseok;Adhikari, Prashanta Dhoj;An, Ki-Seok;Park, Chong-Yun
    • Applied Science and Convergence Technology
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    • v.24 no.3
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    • pp.53-59
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    • 2015
  • The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.

Fabrication of Flexible Passive Matrix by Using Silicon Nano-ribbon (실리콘 나노리본을 이용한 유연한 패시브 매트릭스 소자 제작)

  • Shin, Gun-Chul;Ha, Jeong-Sook
    • Korean Chemical Engineering Research
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    • v.49 no.3
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    • pp.338-341
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    • 2011
  • Thin silicon ribbon was used for fabricating flexible silicon p-i-n junction devices, consisting of 100${\times}$100 arrays of pixels in 1 inch on the diagonal. Those passive matrix devices exhibited the rectification ratio $>10^{4}$ owing to smaller cross-talking current than that of p-n junction devices. P-i-n devices fabricated on silica/silicon substrates are easily detached by treatment with hydrofluoric acid and are subsequently transferred onto both PDMS and flexible PET film.

The Study of the Tunnel Recombination Junction Properties in Multi-Junction Thin Film Silicon Solar Cells (다중 적층형 박막 실리콘 태양 전지의 터널 접합 특성 연구)

  • Hwang, Sun-Tae;Shim, Jenny H.;Chung, Jin-Won;Ahn, Seh-Won;Lee, Heon-Min
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.62.2-62.2
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    • 2010
  • 박막 실리콘 태양 전지는 저가격화 및 대량생산, 대면적화에 유리하다는 장점을 가지고 있다. 단점으로 지적되는 낮은 효율을 극복하기 위해 광흡수층의 밴드갭이 서로 다른 두 개 이상의 박막을 적층하여, 넓은 파장 대역의 빛을 효과적으로 흡수함으로써 광변환 효율을 올리기 위한 많은 연구가 이루어지고 있다. 서로 다른 밴드갭의 광흡수층을 가진 p-i-n 구조를 다중 적층하여 고효율의 태양 전지를 제작하기 위해서는 n-도핑층과, p-도핑층 간에 전자와 정공이 빠르게 재결합할 수 있는 터널 접합(Tunnel Recombination Junction)의 형성이 필수적이며, 이때 광손실이 최소화되도록 해야한다. 만약 터널 접합이 적절하게 형성되지 않으면 결합되지 않은 전자와 정공이 도핑층 사이에 쌓이게 되고, 도핑층 사이의 저항 증가로 태양 전지의 광변환 효율은 크게 하락한다. 이번 연구에서는 터널 접합이 잘 이루어지게 하기 위한 n-도핑층 및 p-도핑층 박막의 특성과, 터널 접합의 특성에 따른 적층형 태양 전지의 광효율 변화를 확인하였다. 광흡수층 및 도핑층은 TCO($SnO_2:F$, Asahi) 유리 기판 위에 PECVD를 사용하여 p-i-n 구조로 RF Power 조건에서 증착되었고, ${\mu}c$-Si 광흡수층의 경우에는 VHF Power 조건에서 증착되었다. 광흡수층이 a-Si/${\mu}c$-Si의 구조를 가지는 이중 접합 태양 전지에서 ${\mu}c$-Si n-도핑층/${\mu}c$-Si p-도핑층 사이의 터널 접합 실험 결과 n-도핑층 및 p-도핑층의 결정화도와 도핑 농도를 조절하여 터널 접합의 저항을 최소화했고, 터널 접합 특성이 이중 접합 셀의 광효율 특성과 유사한 경향을 보임을 확인하였다. 광흡수층이 a-Si/a-SiGe/${\mu}c$-Si의 구조를 가지는 삼중 접합 태양 전지 실험의 경우 a-Si과 a-SiGe 광흡수층 사이에 ${\mu}c$-Si n-도핑층/${\mu}c$-Si p-도핑층/a-SiC p-도핑층의 구조를 적용하여 터널 접합을 형성하였으며, ${\mu}c$-Si p-도핑층의 두께 및 박막 특성을 개선하여 광손실이 최소화된 터널 접합을 구현하였고, 삼중 접합 태양 전지에 적용되었다.

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Transient Phenomena in the Temperature rise of p-n Junctions (p-n Junction에서의 온도상승의 과도현상)

  • Lee, U-Il;Son, Byeong-Gi;Lee, Geon-Il
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.7 no.4
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    • pp.14-19
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    • 1970
  • Transient phenomena in the p-n junction due to the selfheating effect of microplasma current have been investigated for the cases of small current and of large current. For the small current case, the temperature rise of the microplasma site is proportional to the current decrease and a unique time constant could be defined. However, the situation was complicated for the case of large current, and the time constant was not uniquely defined.

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