• Title/Summary/Keyword: oxide thickness measurement

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The Electrical Characteristics of Chromium Oxide Film Produced by Son Beam Sputter Deposition (이온선 스퍼터 증착법에 의하여 제조된 CrOx의 전기적 특성)

  • 조남제;이규용
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.6
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    • pp.518-523
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    • 2002
  • The influences of ion beam energy and reactive oxygen partial pressure on the physical and crystallographic characteristics of transition metal oxide compound(CrOx) film were studied in this paper. Chromium oxide films were deposited onto a cover-glass using ion Beam Sputter Deposition(IBSD) technique according to the various processing parameters. Crystallinity and grain size of as-deposited films were analyzed using XRD analysis. Thickness and Resistivity of the films were measured by $\alpha$-step and 4-point probe measurement. According to the XRD, XPS and resistivity results, the deposited films were the cermet type films which had crystal structure including amorphous oxide(a-oxide) phase and metal Cr phase simultaneously. The increment of the ion beam energy during the deposition process led to decreasing of metal Cr grain size and the rapid change of resistivity above the critical $O_2$ partial pressure.

Effect of the Substrate Temperature on the Copper Oxide Thin Films

  • Park, Ju-Yeon;Gang, Yong-Cheol
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.71-71
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    • 2010
  • Copper oxide thin films were deposited on the p-type Si(100) by r.f. magnetron sputtering as a function of different substrate temperature. The deposited copper oxide thin films were investigated by atomic force microscopy (AFM), scanning electron microscopy (SEM), spectroscopic ellipsometry (SE), X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS). The SEM and SE data show that the thickness of the copper oxide films was about 170 nm. AFM images show that the surface roughness of copper oxide films was increased with increasing substrate temperature. As the substrate temperature increased, monoclinic CuO (111) peak appeared and the crystal size decreased while the monoclinic CuO (-111) peak was independent on the substrate temperature. The oxidation states of Cu 2p and O 1s resulted from XPS were not affected on the substrate temperature. The contact angle measurement was also studied and indicated that the surface of copper oxide thin films deposited high temperature has more hydrophobic surface than that of deposited at low temperature.

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Study on The Electrical Characteristics of Chromium Oxide Film Produced by ton Beam Sputter Deposition (이온선 스퍼터 증착법에 의하여 제초된 CrOX의 전기적 특성에 관한 연구)

  • 조남제;장문식;이규용
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.11a
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    • pp.409-414
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    • 1999
  • The influence of ion beam energy and reactive oxygen partial pressure on the electrical and crystallographic characteristics of transition metal oxide compound(Cr0x) film was studied in this paper. Chromium oxide films were prepared onto the coverglass using Ion Beam Sputter Deposition(1BSD) technique according to the processing conditions of the partial pressure of reactive oxygen gas and ion beam energy. Crystallinity and grain size of as-deposited films were analyzed using XRD analysis. Thickness and Resistivity of the films were measured by $\alpha$-step and 4-point probe measurement. As results, according to the XRD, XPS and resistivity measurement, the deposited films were the cermet type films which has a crystal structure including amorphous oxide(a-oxide) phase and metal Cr phase simultaneously. The increasernent of the ion b m energy during the deposition process happened to decreasernent of metal Cr grain size and the rapid change of resistivity above the critical $O_2$ partial pressure.

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Thermal Behavior Variations in Coating Thickness Using Pulse Phase Thermography

  • Ranjit, Shrestha;Chung, Yoonjae;Kim, Wontae
    • Journal of the Korean Society for Nondestructive Testing
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    • v.36 no.4
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    • pp.259-265
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    • 2016
  • This paper presents a study on the use of pulsed phase thermography in the measurement of thermal barrier coating thickness with a numerical simulation. A multilayer heat transfer model was ussed to analyze the surface temperature response acquired from one-sided pulsed thermal imaging. The test sample comprised four layers: the metal substrate, bond coat, thermally grown oxide and the top coat. The finite element software, ANSYS, was used to model and predict the temperature distribution in the test sample under an imposed heat flux on the exterior of the TBC. The phase image was computed with the use of the software MATLAB and Thermofit Pro using a Fourier transform. The relationship between the coating thickness and the corresponding phase angle was then established with the coating thickness being expressed as a function of the phase angle. The method is successfully applied to measure the coating thickness that varied from 0.25 mm to 1.5 mm.

Electrode Thickness Optimization at Full Color OLED and Analysis of Power Consumption

  • Park, Sung-Joon;Kim, Ok-Tae;Kim, Hee-Je
    • KIEE International Transactions on Electrophysics and Applications
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    • v.4C no.3
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    • pp.106-110
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    • 2004
  • The operating condition of the OLED (organic light-emitting diode) is very sensitive to electrode thickness properties. The electrode thickness is a significant issue in the construction of OLEDs because of its transparency, high conductivity and high efficiency as an injector into organic materials. We carried out a systematic study to optimize the electrode thickness conditions in Indiumtin oxide (ITO), Molybdenum (Mo) and Aluminum (Al). Further, we measured electrode thickness under standard conditions [ITO 1500$\AA$, Mo 2600$\AA$, Al 1500$\AA$]. We also evaluated power consumption. In addition, we analyzed substrate uniformity with IVL measurement results. From these results, it is known that the electrode thickness should be optimized in order to accomplish optimal power efficiency.

Study of The SiC CMOS Gate Oxide (SiC CMOS 게이트 산화막에 관한 연구)

  • 최재승;이원선;신동현;김영석;이형규;박근형
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.29-32
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    • 2001
  • In this paper, the thermal oxidation behaviors and the electrical characteristics of the thermal oxide grown on SiC are discussed. For these studies the oxide layers with various thickness were on SiC in wet $O_2$ or dry $O_2$ at l15$0^{\circ}C$ and the MOS capacitors using the 350$\AA$ gate oxide grown in wet $O_2$ were fabricated and electrically characterized. It was found from the experimental results that the oxidation rate of SiC with the Si-face and with the carbon-face were about 10% and 50% of oxidation rate of Si. The C-V measurement results of the SiC oxide showed abnormal hysterisis properties which had ever been not observed for the Si oxide. And the hysterisis behavior was seen more significant when initial bias voltage was more negative or more positive. The hysterisis property of the SiC oxide was believed to be due the substantial amount of the deep level traps to exist at the interface between the oxide and the SiC substrate. The leakage of the SiC oxide was found to be one order larger than the Si oxide, but the breakdown strength was almost equal to that of the Si oxide.

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Measurement of Interface Trapped Charge Densities $(D_{it})$ in 6H-SiC MOS Capacitors

  • Lee Jang Hee;Na Keeyeol;Kim Kwang-Ho;Lee Hyung Gyoo;Kim Yeong-Seuk
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.343-347
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    • 2004
  • High oxidation temperature of SiC shows a tendency of carbide formation at the interface which results in poor MOSFET transfer characteristics. Thus we developed oxidation processes in order to get low interface charge densities. N-type 6H-SiC MOS capacitors were fabricated by different oxidation processes: dry, wet, and dry­reoxidation. Gate oxidation and Ar anneal temperature was $1150^{\circ}C.$ Ar annealing was performed after gate oxidation for 30 minutes. Dry-reoxidation condition was $950^{\circ}C,$ H2O ambient for 2 hours. Gate oxide thickness of dry, wet and dry-reoxidation samples were 38.0 nm, 38.7 nm, 38.5 nm, respectively. Mo was adopted for gate electrode. To investigate quality of these gate oxide films, high frequency C- V measurement, gate oxide leakage current, and interface trapped charge densities (Dit) were measured. The interface trapped charge densities (Dit) measured by conductance method was about $4\times10^{10}[cm^{-1}eV^{-1}]$ for dry and wet oxidation, the lowest ever reported, and $1\times10^{11}[cm^{-1}eV^{-1}]$ for dry-reoxidation

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Comparison of Gate Thickness Measurement

  • 장효식;황현상;김현경;문대원
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.197-197
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    • 1999
  • Gate oxide 의 두께 감소는 gate의 캐패시턴스를 증가시켜 트랜지스터의 속도를 빠르게 하며, 동시에 저전압 동작을 가능하게 하기 때문에 gate oxide 두께는 MOS 공정 세대가 진행되어감에 따라 계속 감소할 것이다. 이러한 얇은 산화막은 device design에 명시된 두께의 특성을 나타내야 한다. Gate oxide의 두께가 작아질수록 gate oxide와 crystalline silicon간의 계면효과가 박막의 두께의 결정에 심각한 영향을 주기 때문에 정확한 두께 계측이 어렵다. 이러한 영향과 계측방법에 따라서 두께 계측의 차이가 나타난다. XTEM은 사용한 parameter에, Ellipsometer는 refractive index에, MEIS(Medium) Energy Ion Scattering)은 에너지 분해능에, Capacitor-Voltage 측정은 depletion effect에 의해 영향을 받는다. 우리는 계면의 원자분해능 분석에 통상 사용되어온 High Resolution TEM을 이용하여 약 30~70$\AA$ SiO2층의 두께와 계면 구조에 대한 분석을 하여 이를 MEIS와 0.015nm의 고감도를 가진 SE(Spectroscopy Ellipsometer), C-V 측정 결과와 비교하여 가장 좋은 두께 계측 방법을 찾고자 한다.

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