• Journal of the Korean Vacuum Society
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• v.17 no.1
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• pp.73-79
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• 2008

In order to apply for transparent conductive oxide(TCO), we deposited ZnO thin films on the glass at room temperature by RF magnetron sputtering method. Deposition conditions for high transmittance and low resistivity were optimized in our previous studies. Under the deposition condition with the RF power of 200 W, target to substrate distance of 30 mm and working pressure of 5 mTorr, highly conductive($7.4{\times}10^{-3}{\Omega}cm$) and transparent(over 85%) ZnO films were prepared. Highly oriented ZnO film in the [002] direction were obtained with specifically designed ZnO targets. Systematic study on dependence of deposition parameters on electrical and optical properties of the as-grown ZnO films were mainly investigated in this work. And for application tests using these films as transparent conductive oxide anodes, wet chemical etching behaviors of ZnO films were also investigated using various chemicals. Wet-chemical etching behavior of ZnO films were investigated using various acid solutions. The concentrations of these different acid solutions were controlled to study the etching shapes and etching rate. ZnO films were anisotropically etched at various concentrations and wet etching led to crater-like surface structure. Also we firstly found that the etching rate and etching shapes of ZnO films strongly depended on the etchant concentrations (i.e. pH) and the etching rate is exponentially decreased with increasing pH values regardless of the acid etchants.

• Journal of the Korean Ceramic Society
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• v.31 no.5
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• pp.485-490
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• 1994

The reactive ion etching characteristics of aluminum oxide films, prepared by PECVD, were investigated in the CCl4 plasma. The atomic chlorine concentration and the DC self bias were determined at various etching conditions, and their effects on the etch rate of aluminum oxide film were studied. The bombarding energy of incident particles was found to play the more important role in determining the etch rate of aluminum oxide rather than the atomic chlorine concentration. It is considered to be because the bombardment of ions or neutral atoms breaks the strong Al-O bonds of aluminum oxide to help activate the formation reaction of AlCl3 which is the volatile etch product.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.1
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• pp.99-102
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• 2002

Pinholes on the thermally grown oxide, which is called gate oxide, on silicon substrate under polysilicon layer are found and its mechanism is analyzed in this paper. The oxide under a polysilicon layer is broken during the plasma etching process of other polysilicon layer. Both polysilicon layers are separated with 0.8${\mu}{\textrm}{m}$ thick oxide deposited by CVD (Chemical Vapor Deposition). Since broken oxide points are found scattered around an arc occurrence point, it is assumed that an extremely high electric field generated near the arc occurrence point makes the gate oxide broken. 1'he arc occurrence point has been observed on the alignment key and is the mark of low yield. It is found that any arc occurrence can cause chips to fail by breaking the gate oxide, even if are occurrence points are found on scribeline.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.284-284
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• 2011

Recently, the increasing degree of device integration in the fabrication of Si semiconductor devices, etching processes of nano-scale materials and high aspect-ratio (HAR) structures become more important. Due to this reason, etch selectivity control during etching of HAR contact holes and trenches is very important. In this study, The etch selectivity and etch rate of TEOS oxide layer using ACL (amorphous carbon layer) mask are investigated various process parameters in CH2F2/C4F8/O2/Ar plasma during etching TEOS oxide layer using ArF/BARC/SiOx/ACL multilevel resist (MLR) structures. The deformation and etch characteristics of TEOS oxide layer using ACL hard mask was investigated in a dual-frequency superimposed capacitively coupled plasma (DFS-CCP) etcher by different fHF/ fLF combinations by varying the CH2F2/ C4F8 gas flow ratio plasmas. The etch characteristics were measured by on scanning electron microscopy (SEM) And X-ray photoelectron spectroscopy (XPS) analyses and Fourier transform infrared spectroscopy (FT-IR). A process window for very high selective etching of TEOS oxide using ACL mask could be determined by controlling the process parameters and in turn degree of polymerization. Mechanisms for high etch selectivity will discussed in detail.

• Journal of Technologic Dentistry
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• v.31 no.2
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• pp.23-30
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• 2009

All-ceramic restorations have gained acceptance among clinicians and patients because of their superior esthetics. Most all-ceramic systems have a 2-layer structure, using a weak veneering ceramic over a strong supporting core. often, failure of all-ceramic restorations occurs when the veneering ceramic fractures, exposing the core material. The purpose of this study was to compare the shear bond strength of heat press ceramic system (Zirpress) to zirconia core with various surface treatments. 10 metal cores and 50 zirconia cores were fabricated and divided into six groups according to surface treatment such as Zirliner application, aluminium oxide blasting, and 9.5% HF etching. Sixty specimens were prepared using Zirpress, veneered 8mm height and 3mm in diameter, over the zirconia cores (n=10). The shear bond strength test was performed in a universal testing machine with a crosshead speed of 1/min. Ultimate shear bond strength data were analyzed with One-way ANOVA and the Scheffe's test (p=.05). Within the limits of this study, the following conclusions were drawn: The mean shear bond strengths (MPa) were: 12.93 for $110{\mu}m$ aluminium oxide blasting/Rexillium III/IPS e.Max Zirpress; 14.92 for $50{\mu}m$ aluminium oxide blasting ${\pm}9.5%$ HF etching/Zirconis core/IPS e.Max Zirpress; 16.37 for $110{\mu}$ aluminium oxide blasting + 9.5% HF etching/Zirconis core/IPS e.Max Zirpress; 12.89 for $200{\mu}$ aluminium oxide blasting + 9.5% HF etching/Zirconis core/IPS e.Max Zirpress; 19.30 for 9.5% HF etching/Zirconis core/IPS e.Max Zirpress; 19.55 for Zirliner/Zirconis core/IPS e.Max Zirpress. The mean shear bond strength for ZNTZH (Zirliner/Zirconis core) and ZNTEH (9.5% HF etching/Zirconis core) were significantly superior to MS110H ($110{\mu}$ aluminium oxide blasting/Rexillium III) and ZS200EH ($200{\mu}$ aluminium oxide blasting + 9.5% HF etching/Zirconis core) (p<0.05).

• Transactions on Electrical and Electronic Materials
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• v.16 no.6
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• pp.312-316
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• 2015

Through silicon via (TSV) technology holds the promise of chip-to-chip or chip-to-package interconnections for higher performance with reduced signal delay and power consumption. It includes high aspect ratio silicon etching, insulation liner deposition, and seamless metal filling. The desired etch profile should be straightforward, but high aspect ratio silicon etching is still a challenge. In this paper, we investigate the use of etch hard mask for finer TSVs etching to have clear definition of etched via pattern. Conventionally employed photoresist methods were initially evaluated as reference processes, and oxide and metal hard mask were investigated. We admit that pure metal mask is rarely employed in industry, but the etch result of metal mask support why hard mask are more realistic for finer TSV etching than conventional photoresist and oxide mask.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.351-354
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• 2004

This work presents a simple and cost-effective approach for maskless fabrication of positive-tone silicon master for the replica molding of hyperfine elastomeric channel. Positive-tone silicon masters were fabricated by a maskless fabrication technique using the combination of nanoscratch by Nanoindenter ⓡ XP and XOH wet etching. Grooves were machined on a silicon surface coated with native oxide by ductile-regime nanoscratch, and they were etched in a 20 wt％ KOH solution. After the KOH etching process, positive-tone structures resulted because of the etch-mask effect of the amorphous oxide layer generated by nanoscratch. The size and shape of the positive-tone structures were controlled by varying the etching time (5, 15, 18, 20, 25, 30 min) and the normal loads (1, 5 mN) during nanoscratch. Moreover, the effects of the Berkovich tip alignment (0, 45$^{\circ}$) on the deformation behavior and etching characteristic of silicon material were investigated.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.3
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• pp.65-71
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• 1999

The effects of mask materials and etching solutions on the dimensional accuracy of V-groove were studied for the alignment between optoelectronic devices and optical fibers in optical packaging. PECVD nitride, LPCVD nitride, or thermal oxide($SiO_2$) was used as a mask material. The anisotropic etching solution was KOH(40wt%) or the mixture of KOH and IPA. LPCVB nitride has the best etching selectivity and thermal oxide was etched most rapidly in KOH(40wt%) at $85^{\circ}C$ among the mask materials studied here. The V-groove size enlarged than the designed value. This phenomenon was due to the undercutting benearth the mask layer from the etching toward Si (111) plane. The etch rate of (111) plane wart 0.034 - 0.037 $\mu\textrm{m}$/min in KOH(40wt%). This rate was almost same regardless of mask materials. When IPA added to KOH(40wt%), the etch rate of (100) plane and (111) plane decreased, but etching ratio of (100) to (111) plane increased. Consequently, the undercutting phenomenon due to etching toward (111) plane decreased and the size of V-groove could be controlled more accurately.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.6
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• pp.1465-1468
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• 2010

The wet etching is a process using chemical solution and occurring chemical reaction on substrate surface. when we do wet etching process, we have to consider stoichiometry, etching time and temperature of etchant for good resolution. In this experiment, we used Cr, Al andIndium-tin-oxide (ITO) metal and we deposited them with DC sputtering machine. The Cr thin film metal thickness is about $1300{\AA}$, ITO films show a low electrical resistance and high transmittance in the visible range of an optical spectrum and Ai film is used for signal line. We measured and analysed wet etching properties on the metal thin films.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.10
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• pp.844-850
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• 2002

Linearly graded profiles on the field area oxide are frequently used in power integrated circuits to reduce the surface electric field when power devices are operated in forward or reverse blocking modes. It is shown here that tapered windows can be made using the difference of etch rates between the bottom and the top layer of TEOS film. Annealed TEOS films are etched at a lower rate than the TEOS film without annealing Process. The fast etching layer results in window walls having slopes in the range of 25$^{\circ}$∼ 80$^{\circ}$ with respect to the wafer surface. Taper etching technique by annealing the TEOS film applies to high voltage LDMOS, which is compatible with CMOS process, due to the minimum changes in both of design rules and thermal budget.