• Title/Summary/Keyword: oscillator phase noise

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A Ku-Band Hair-Pin Resonator Oscillator with a New Varactor Coupled Line Structure (개선된 바랙터 결합 선로를 이용한 Ku-Band 헤어핀 발진기 설계)

  • Choi, Kwang-Seok;Won, Duck-Ho;Yun, Sang-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.1
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    • pp.83-89
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    • 2010
  • In this paper, we propose a new varactor coupled line structure and design the VCO using the proposed structure. The proposed coupled line structure removes the reflected signals from the varactor diode using an added $\lambda$/4 transmission line. The frequency synthesizers are designed using the PLL technique at Ku-band. The synthesizer using the proposed coupled structure has 38 MHz frequency tuning range and -97 dBc/Hz phase noise characteristic at 100 KHz offset frequency. The measured results show improved tuning range as well as the improved phase noise characteristics compared to the conventional designs.

A Realization on the Dualband VCO Using T-Junction Switching Circuit (T-Junction 스위칭 회로를 이용한 이중 대역 전압제어 발진기 구현)

  • Oh Icsu;Seo Chulhun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.1
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    • pp.105-110
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    • 2005
  • In this paper, a new technique to reduce the phase noise in microwave oscillators is proposed using the resonant characteristics of the Photonic Bandgap(PBG). We applied PBG structure to ground of the microstrip line resonator with the low Q(Quality factor). Therefore, we improved about 10 dBc in contrast to phase noise characteristic of the conventional microstrip line oscillator at 2.4 GHz @ 100 MHz offset. Output power is 7.09 dBm.

Design of 130nm CMOS Voltage Controlled Oscillator Using Optimized Spiral Inductor for L1 band GPS Receiver (최적화된 나선형 인덕터를 이용한 L1 band GPS 수신기용 130nm CMOS VCO 설계)

  • Ahn, Deok Ki;Hwang, In Chul
    • Journal of Industrial Technology
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    • v.29 no.B
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    • pp.101-105
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    • 2009
  • A 1.571GHz LC VCO with optimized spiral inductor for GPS receiver is designed in 130nm CMOS process. The phase noise of the VCO has been reduced the use of high Q inductor and on chip filter. It has phase noise of -91dBc/Hz, -111dBc/Hz, and -131dBc/Hz at 10kHz, 100kHz, and 1MHz offset frequencies from the carrier, respectively. This VCO consumes 2mA from a 0.6V supply.

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The Design of a X-Band Frequency Synthesizer using the Subharmonic Injection Locking method (Subharmonic Injection Locking 방법을 이용한 X-Band 주파수 합성기 설계)

  • Kim, Ji-Hye;Yun, Sang-Won
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.269-272
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    • 2003
  • A low phase noise frequency synthesizer at X-Band which employs the subharmonic injection locking was designed and tested. The frequency synthesizer consists of two oscillators - master and slave : A 1.75GHz master oscillator made of PLL synthesizer produces 6th harmonic at 10.5GHz, which excites the following 10.5GHz slave oscillator. The realized frequency synthesizer has a 4.5dBm of output power, and a phase noise of -108dBc/Hz at the 100kHz offset frequency.

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Comparison of Two Layout Options for 110-GHz CMOS LC Cross-Coupled Oscillators

  • Kim, Doyoon;Rieh, Jae-Sung
    • Journal of electromagnetic engineering and science
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    • v.18 no.2
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    • pp.141-143
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    • 2018
  • Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.

A study on the improvement in Q-factor chracteristics of VCO resonance part (VCO 공진부의 Q-factor 특성향상에 관한 연구)

  • Lee, Hyun-Jong;Kim, In-Sung;Min, Bok-Gi;Song, Jae-Sung
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1506-1508
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    • 2005
  • VCO(voltage controlled oscillator) using mobile communication device decides direct characteristics as parts that affect important in stable oscillation and distortion characteristics of system. VCO used 900 MHz band was designed by the transformation of Colpitts circuit form use ADS that consider Q-factor to minimize phase noise. VCO manufactured together evaluation board and voltage control oscillator to FR-4 PCB. VCO experimented chracteristics after control through resonance department tuning. In our research, the designed VCO has 15.5 dBm output level at the bias condition of 6V and 10mA and the operating frequency range of 917 MHz$\sim$937 MHz band. Phase noise is -98.28 dBc/Hz at 1 MHz frequency offset from the carrier.

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Phase Noise Suppression Algorithm for OFDM-based 60 GHz WLANs (OFDM 기반의 60GHz 무선랜 전송방식에서 위상잡음 제거)

  • Roh Ho-Jin;Ahn Kyung seung;Lee Woo-Young;Baik Heung-Ki
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.3-6
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    • 2004
  • This paper. we investigate the OFDM-based wireless LAN systems operating in the 60 GHz frequency band as part of the fourth-generation (4G) systems. The 60 GHz band is of much interest since this is the band in which a massive amount of spectral space (5 GHz) has been allocated worldwide for dense wireless local communications. This paper gives an overview of 60 GHz indoor wireless channel characteristics and an effect on phase noise. The performance of OFDM system is severely degraded by the local oscillator phase noise, which causes both common phase error and inter-carrier interference. We provide the exact analysis of the phase noise effect on the OFDM system.

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Design of the 1.9-GHz CMOS Ring Voltage Controlled Oscillator using VCO-gain-controlled delay cell (이득 제어 지연 단을 이용한 1.9-GHz 저 위상잡음 CMOS 링 전압 제어 발진기의 설계)

  • Han, Yun-Tack;Kim, Won;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.72-78
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    • 2009
  • This paper proposes a low phase noise ring voltage controlled oscillator(VCO) with a standard $0.13{\mu}m$ CMOS process for PLL circuit using the VCO-gain-controlled Delay cell. The proposed Delay cell architecture with a active resistor using a MOS transistor. This method can reduced a VCO gain so that improve phase noise. And, Delay cell consist of Wide-Swing Cascode current mirror, Positive Latch and Symmetric load for low phase noise. The measurement results demonstrate that the phase noise is -119dBc/Hz at 1MHz offset from 1.9GHz. The VCO gain and power dissipation are 440MHz/V and 9mW, respectively.

Low Phase Noise Push-Push VCO Using Microstrip Square Open Loop Resonator and Tunable Negative Resistance (마이크로스트립 사각 개방 루프 공진기와 가변 부성 저항을 이용한 저위상 잡음 Push-Push 전압 제어 발진기)

  • Choi, Jae-Won;Seo, Chul-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.8
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    • pp.847-853
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    • 2007
  • In this paper, a novel push-push voltage-controlled oscillator(VCO) using microstrip square open loop resonator and tunable negative resistance is presented. The microstrip square open loop resonator has the large coupling coefficient value, which makes a high Q value, and has reduced phase noise of VCO. The VCO with 1.8V power supply has phase noise of $-124.67{\sim}-122.67dBc/Hz\;@\;100 kHz$ in the tuning range, $5.744{\sim}5.859 GHz$. The FOM of this VCO is $-202.83{\sim}-201dBc/Hz\;@\;100 kHz$ in the same tuning range. When it has been compared with single-ended VCO using microstrip square open loop resonator, and push-push oscillator using microstrip line resonator, the reduced phase noise has been -8.51dB, and -33.67dB, respectively.

A Design of 5.8 ㎓ Oscillator using the Novel Defected Ground Structure

  • Joung, Myoung-Sub;Park, Jun-Seok;Lim, Jae-Bong;Cho, Hong-Goo
    • Journal of electromagnetic engineering and science
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    • v.3 no.2
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    • pp.118-125
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    • 2003
  • This paper presents a 5.8-㎓ oscillator that uses a novel defected ground structure(DGS), which is etched on the metallic ground plane. As the suggested defected ground structure is the structure for mounting an active device, it is the roles of a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM simulation ,md simple circuit analysis method. In order to demonstrate a new DGS oscillator, we designed the oscillator at 5.8-㎓. The experimental results show 4.17 ㏈m output power with over 22 % dc-to-RF power efficiency and - 85.8 ㏈c/Hz phase noise at 100 KHz offset from the fundamental carrier at 5.81 ㎓.