• Title/Summary/Keyword: operation target

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Physical Database Design for DFT-Based Multidimensional Indexes in Time-Series Databases (시계열 데이터베이스에서 DFT-기반 다차원 인덱스를 위한 물리적 데이터베이스 설계)

  • Kim, Sang-Wook;Kim, Jin-Ho;Han, Byung-ll
    • Journal of Korea Multimedia Society
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    • v.7 no.11
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    • pp.1505-1514
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    • 2004
  • Sequence matching in time-series databases is an operation that finds the data sequences whose changing patterns are similar to that of a query sequence. Typically, sequence matching hires a multi-dimensional index for its efficient processing. In order to alleviate the dimensionality curse problem of the multi-dimensional index in high-dimensional cases, the previous methods for sequence matching apply the Discrete Fourier Transform(DFT) to data sequences, and take only the first two or three DFT coefficients as organizing attributes of the multi-dimensional index. This paper first points out the problems in such simple methods taking the firs two or three coefficients, and proposes a novel solution to construct the optimal multi -dimensional index. The proposed method analyzes the characteristics of a target database, and identifies the organizing attributes having the best discrimination power based on the analysis. It also determines the optimal number of organizing attributes for efficient sequence matching by using a cost model. To show the effectiveness of the proposed method, we perform a series of experiments. The results show that the Proposed method outperforms the previous ones significantly.

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Scalable FFT Processor Based on Twice Perfect Shuffle Network for Radar Applications (레이다 응용을 위한 이중 완전 셔플 네트워크 기반 Scalable FFT 프로세서)

  • Kim, Geonho;Heo, Jinmoo;Jung, Yongchul;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.22 no.5
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    • pp.429-435
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    • 2018
  • In radar systems, FFT (fast Fourier transform) operation is necessary to obtain the range and velocity of target, and the design of an FFT processor which operates at high speed is required for real-time implementation. The perfect shuffle network is suitable for high-speed FFT processor. In particular, twice perfect shuffle network based on radix-4 is preferred for very high-speed FFT processor. Moreover, radar systems that requires various velocity resolution should support scalable FFT points. In this paper, we propose a 8~1024-point scalable FFT processor based on twice perfect shuffle network algorithm and present hardware design and implementation results. The proposed FFT processor was designed using hardware description language (HDL) and synthesized to gate-level circuits using $0.65{\mu}m$ CMOS process. It is confirmed that the proposed processor includes logic gates of 3,293K.

Design and Development of Signal Transmitting POD for Aircraft Application (항공기용 신호 송출 POD의 설계 및 개발)

  • Kim, Jee-heung;Kwak, Young-kil;Kim, Kichul;Park, Joo-rae
    • Journal of Advanced Navigation Technology
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    • v.24 no.1
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    • pp.1-8
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    • 2020
  • In this research, we develop an airborne equipment radiating S/C-band signal to a target located at a long distance. RF interface of the equipment comprises band-specific transmitters and an broadband antenna to satisfy EIRP(effective isotropic radiated power) requirements. The equipment is in a shape of a POD like an aircraft fuel tank. The measured weight of the equipment is 119.8 kg, the CG(center of gravity) is 1391.35 mm and the MOI(moment of inertia) are 46.07 ± 0.05(Iyy) kg·㎡, 45.36 ± 0.09(Izz) kg·㎡. All results are found to meet the requirements for aircraft installation. To verify flight safety, EMI(electromagnetic interference) tests (RE102, CE102), environmental tests (high/low temperature operation, altitude), intra-system EMC(electromagnetic compatibility) and HERP(hazards electromagnetic radiation personnel) tests have been conducted and all the test results met the requirements. It is confirmed that the equipment could be mounted on the aircraft by meeting all electrical and mechanical requirements.

A Development and Design of Embedded Linux System (Embedded Linux 시스템 설계 및 구현에 관한 연구)

  • 유임종;고성찬
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.129-132
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    • 2003
  • In this paper, which sees the Strong-ARM SA1110 it used the main CPU and RTP in VoIP system. It will be able to apply the information communication field it embodied. It used the Tynux_box2 with the hardware side and it composed a VOIP system. And it used the RTP which is a real-time protocol in software control portion. The development environment of the paper that used the Target board and a Linux PC for connection used the RS-232C, USB connection, Ethernet LAN. The VoIP the environment for a communication used the wave file in the substitution which changes analog signal with the digital signal. And For the communication of the both sides it used the socket. This paper explained the fact that against a general technique from the operation of VoIP system. Using the Embedded linux development board which explained an operational process of the RTP protocol.

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Cache and Pipeline Architecture Improvement and Low Power Design of Embedded Processor (임베디드 프로세서의 캐시와 파이프라인 구조개선 및 저전력 설계)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.289-292
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    • 2008
  • This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of OpenRISC processor and a clock gating algorithm using ODC (Observability Don't Care) operation for a low-power processor. The branch prediction algorithm has a structure using BTB(Branch Target Buffer) and 4-way set associative cache has lower miss rate than direct-mapped cache. The clock gating algorithm reduces dynamic power consumption. As a result of estimation of performance and dynamic power, the performance of the OpenRISC processor using the proposed algorithm is improved about 8.9% and dynamic power of the processor using samsung $0.18{\mu}m$ technology library is reduced by 13.9%.

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Transparent TIO/Ag NW/TIO Hybrid Electrode Grown on PET for Flexible Organic Solar Cell

  • Seo, Ki-Won;Lee, Ju-Hyun;Na, Seok-In;Kim, Han-ki
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.394.2-394.2
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    • 2014
  • We fabricated highly transparent and flexible Ti doped In2O3 (TIO)/Ag nanowire(NW)/TIO (TAT) multilayer electrodes by linear facing target sputtering (LFTS) and brush-painting for used as flexible for anode organic solar cells(FOSCs). The characteristics of TAT transparent anode as a function of number of brush-painting cycles was also investigated. At optimized conditions we achieved highly flexible TAT multilayer electrodes with a low sheet resistance of $9.01{\Omega}/square$ and a high diffusive transmittance more than 80% in visible region as well as superior mechanical stability. The effective embedment of the Ag NW network between top and bottom TIO films led to a metallic conductivity, high transparency. Based on FE-SEM HRTEM, and XRD analysis, we can find that the Ag NW network was effectively embedded between top and bottom TIO layers due to good flexibility of Ag NW, the TAT multilayer showed superior flexibility than single TIO layer. Successful operation of FOSCs with high power conversion efficiency of 3.01% indicates that TAT hybrid electrode is a promising alternative to conventional ITO electrode for high performance FOSCs.

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Research of Electric Pilotage Service using Intelligence Aids to Navigation System (인공지능 항로표지 시스템을 이용한 전자도선 서비스에 관한 연구)

  • GANG, Yongsoo;JEONG, Haesang;KIM, Jeong-Rok;GUG, Seung-Gi
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2019.11a
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    • pp.107-108
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    • 2019
  • In the past, regional pilot service is provided by individual pilots directly on board each ship, but it will be difficult to provide this type of service in the near future when autonomous vessels are activated. This can be seen as the need for automation and intelligence of pilot service and provision of remote control system. In this paper, we propose a method, system, and service target that can carry out the electronic pilot service through the intelligence aids to navigation for smart port operation.

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Model Validation of a Fast Ethernet Controller for Performance Evaluation of Network Processors (네트워크 프로세서의 성능 예측을 위한 고속 이더넷 제어기의 상위 레벨 모델 검증)

  • Lee Myeong-jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.92-99
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    • 2005
  • In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

A Study on Usage and Demand of the Business Simulation Game, and Design of the Course Model (경영시뮬레이션게임의 활용실태와 교과모형)

  • Lee, Jae-Won
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.1
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    • pp.73-86
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    • 2012
  • This study has the purpose to increase the suitability for the introduction and operation of the curriculum utilizing business simulation games from university education. So we investigated about the usage in management education department of domestic and foreign universities, institutions target for enterprise level education, and giant companies such as Samsung and LG. We surveyed about the demand of it from college students at the management and engineering departments and then designed two basic course models. As research methods, literature research, on-site experts and operators interview on domestic enterprises and institutions of representative companies was conducted. We analysed the course syllabi of some domestic and about 50 foreign universities utilizing it with the literature review. Then we analysed the result of usage investigation and demand survey. According to the results, the relatively small number of universities and corporate institutions compared to U.S. were utilizing it for their training courses in short-term and partial Lab. Results are expected to be used in the training courses of business administration in universities and corporate.

An Efficient Femto-cell Scanning Scheme Using Network Assistance in IEEE 802.16e System (IEEE 802.16e 시스템에서 망 지원을 이용한 효율적인 펨토셀 스캐닝 방안)

  • Choi, Jae-In;Nam, Jin-Kyu;Seo, Won-Keyong;Cho, You-Ze
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.1B
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    • pp.21-28
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    • 2011
  • The femtocell is a miniaturized Base Station (BS) with low-cost and low-power using general broadband access network as backhaul. It is expected not only to improve indoor coverage but also to reduce a service charge. However, in IEEE 802,16e femtocells, when the Mobile Station (MS) scans neighbor BSs for handover, it takes a long time due to too many number of femto BSs. Also the size of the neighbor advertisement message that will be periodically sent by a serving BS is increased as the number of target femto BSs for scanning increases. In this paper, we proposed an efficient femtocell scanning scheme, using a triangulation mechanism and a femto BS monitoring scheme to reduce the number of scanning operations and the size of the neighbor advertisement messages. The proposed scheme can avoid wasting air resources and reduce scanning overheads by minimal scanning operation. The simulation results showed that the proposed scheme could improve scanning performance and avoid wasting air resources, compared with the conventional scheme of the IEEE 802.16e system.