• Journal of the Korean Institute of Gas
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• v.11 no.1 s.34
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• pp.34-39
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• 2007

In this paper, the FEM result has been presented for a sealing safety between a valve packing and a valve seat during a open and close operation in a LPG cylinder. The sealing operation of a LPG valve is completed when the valve packing in which is made by a nylon-66 polymer is to stop a LP gas flow, which flows out from the outlet of a brass pipe in a LPG cylinder. The contact sealing mechanism of the valve may be classified by a flat contact of an unused valve packing and a circular groove contact of an used valve packing in a current LPG valve. Based on the FEM and experimental investigations the sealing force, 4.9 MPa for a flat contact mode of the unused valve packing is a little high compared to that of the used valve packing, which shows a circular groove contact geometry against a valve seat. But these sealing pressures for two contact modes are very low compared to the ultimate strenath 83 MPa of the nylon-66 and this may be designed with a excess strength of the valve.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.427-431
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• 2007

Applications in present-day mobile communication systems particularly require miniaturized dimensions and low-profiles of antenna in order to meet the mobile units. Thus, size reductions and bandwidth enhancements are becoming crucial design considerations for practical applications of microstrip antennas. The motivation of further experiments have been stepped to follow those studies for achieving compact and broadband, even multiplied operation modes, which are greatly increased with much attentions recently. To obtain broadband, single-feed, circularly polarized characteristics of microstrip antennas, a design with feed-line ought to be a factor of two. Usually, diagonally balanced-line feeds with hybrid coupler are employed to attain circular polarizations. We firstly formulated DGS (Defected Ground Structures) based operation principles of the entire microstrip components and therefore were able to derive impedance variance of feed-lines. After verifying corresponding experimental results, we targeted the frequency bands of UHF RFID (Ultra High Frequency Radio Frequency IDentification) and approximately of 0.4-2.4GHz have exhibited remarkable two resonance amplitudes as a dual band antenna. Our secondary researches were aimed to design quad band microstrip antenna which represents four resonance characteristics within the identical frequency bands as well. Microstrip patch has been meandered to lengthen the electrical paths, and the other design criteria with respecting physical parameters including radiation patterns and impedance bandwidths measurements will be described for verification. Advisable applications of these antennas can be GSM850, GSM900, GPS (L1-1575 and L2-1227) and UMTS-2110 of cellular systems, which extremely desire multiband and minimum size.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1595-1607
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• 2018

In this paper, a hierarchical control strategy is introduced to control a new three-port multidirectional DC-DC converter for integrating an energy storage system (ESS) to a bipolar DC microgrid (BPDCMG). The proposed converter provides a voltage-balancing function for the BPDCMG and adjusts the states of charge (SoC) of the ESS. Previous studies tend to balance the voltage of the BPDCMG buses with active sources or by transferring power from one bus to another. Furthermore, the batteries available in BPDCMGs were charged equally by both buses. However, this power sharing method does not guarantee efficient operation of the whole system. In order to achieve a higher efficiency and lower energy losses, a triple-layer hierarchical control strategy, including a primary droop controller, a secondary voltage restoration controller and a tertiary optimization controller are proposed. Thanks to the multi-functional operation of the proposed converter, its conversion stages are reduced. Furthermore, the efficiency and weight of the system are both improved. Therefore, this converter has a significant capability to be used in portable BPDCMGs such as electric DC ships. The converter modes are analyzed and small-signal models of the converter are extracted. Comprehensive simulation studies are carried out and a BPDCMG laboratory setup is implemented in order to validate the effectiveness of the proposed converter and its hierarchical control strategy. Simulation and experimental results show that using the proposed converter mitigates voltage imbalances. As a result, the system efficiency is improved by using the hierarchical optimal power flow control.

• Transactions of the Korean Society of Automotive Engineers
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• v.25 no.1
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• pp.82-91
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• 2017

This paper is a study on the bi-directional DC-DC converter, one of the key elements of 48V-12V dual systems in mild hybrid electric vehicles. Mild hybrid electric vehicles require a bi-directional DC-DC converter that can efficiently transmit power in two directions between a 48V battery and a 12V battery. To develop a bi-directional DC-DC converter with better price competitiveness, upgraded fuel economy, excellent performance and smaller size, this study designed, produced and presented a circuit that improved on the existing one. In the proposed 8-phase bi-directional DC-DC converter, the size of the passive element was reduced through the 8-phase interleaved topology, whereas downscaling had previously posed a difficulty. This study also designed and produced a 2.5kW class prototype. Based on the proposed 8-phase interleaved topology, a size of 227.5 (W) * 172 (L) * 64.35 (H) was achieved. In the boost mode operation and buck operation modes, the maximum efficiency was recorded at 94.04 % and 95.78 %, respectively.

• Membrane Journal
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• v.25 no.4
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• pp.320-326
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• 2015

In this study, permeation experiments were carried out using the symmetric and asymmetric sinusoidal flux continuous operation (SFCO) modes for the submerged flat sheet membrane in the 0.5 wt% emulsion type cutting oil solution. The effective area and nominal pore size of the used microfiltration membrane were $0.02m^2$ and $0.15{\mu}m$, respectively. The emulsion cutting oil was rejected over 99% based on turbidity. Transmembrane pressure increased lower as the aeration rates increased. The symmetric SFCO mode was a little more effective than the symmetric SFCO mode in low permeate flux between 10 and $15L/m^2{\cdot}h$. However, the symmetric SFCO mode was shown very effectively in high permeate flux between 25 and $30L/m^2{\cdot}h$.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.2
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• pp.271-278
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• 2015

We use various types of cryptographic algorithms for the protection of personal and sensitive informations in the application environments, such as an internet banking and an electronic commerce. However, recent researches were introduced that if we implement modes of operation, padding method and other cryptographic implementations in a wrong way, then the critical information can be leaked even though the underlying cryptographic algorithms are secure. Among these attacking techniques, the padding oracle attack is representative. In this paper, we analyze the possibility of padding oracle attacks of 12 kinds of padding techniques that can be applied to the CBC operation mode of a block cipher. As a result, we discovered that 3 kinds were safe padding techniques and 9 kinds were unsafe padding techniques. We propose 5 considerations when designing a safe padding techniques to have a resistance to the padding oracle attack through the analysis of three kinds of safe padding techniques.

• Journal of the Korea Convergence Society
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• v.10 no.12
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• pp.1-6
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• 2019

In this paper, we have developed an app that can control IPTV - Miracast and the Internet with Android 7.0 on the embedded board. The app can be controlled by the remote control of IPTV and can receive TV when using IPTV. And Miracast and Embedded board are put into the power saving mode. When one mode is selected in this way, the other two modes enter the power saving mode and the power saving control technology is applied to reduce energy consumption. The board used in this paper was Android version 7.1.2 version of Raspberry pie 3B / B + and Asus Tinker board s, and Android Studio program was used to make the app and a synchronization control program was also developed to operate with IPTV remote control. The operation of the Android start program using the power saving power control technology and the remote control synchronization control program developed in this way is confirmed to be normal operation as a result of applying to the actual IPTV.

• Biotechnology and Bioprocess Engineering:BBE
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• v.11 no.5
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• pp.425-431
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• 2006

The development of fermentation conditions for the production of C595 diabody fragment (dbFv) in E. coli HB2151 clone has been explored. Investigations were carried out to study the effect of carbon supplements over the expression period, the comparison of C595 dbfv production in synthetic and complex media, the influence of acetic acid upon antibody production, and comparison of one-stage and two-stage processes operated at batch or fed-batch modes in bioreactor. Yeast extract supplied during expression yielded more antibody fragment than any other carbon supply. The synthetic medium presented higher specific productivity (0.066 mg dbFv $g^{-1}$ dry cell weight) when compared to the complex medium (0.044 mg dbFv $g^{-1}$ DCW). The comparison of fermentation strategies demonstrated that (1) one-stage fed-batch fermentation performed higher C595 dbFv production than that operated in batch mode which was significantly affected by acetate concentration; (2) a two-stage batch operation could enhance C595 dbFv production. It was found that a concentration of 12.3 mg $L^{-1}$ broth of C595 dbFv and a cell concentration of 10.8g $L^{-1}$ broth were achieved at the end of two-stage operation in 5-L fermentation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11C
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• pp.148-156
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• 2001

This paper proposed embedded application-specific microprocessor(YS-RDSP) whose structure has an additional DSP processor on chip. The YS-RDSP can execute maximum four instructions in parallel. To make program size shorter, 16-bit and 32-bit instruction lengths are supported in YS-RDSP. The YS-RDSP provides programmability. controllability, DSP processing ability, and includes eight-kilobyte on-chip ROM and eight-kilobyte RAM. System controller on the chip gives three power-down modes for low-power operation, and SLEEP instruction changes operation statue of CPU core and peripherals. YS-RDSP processor was implemented with Verilog HDL on top-down methodology, and it was improved and verified by cycle-based simulator written in C-language. The verified model was synthesized with 0.7um, 3.3V CMOS standard cell library, and the layout size was 10.7mm78.4mm which was implemented by using automatic P&R software.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2024-2034
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• 2016

This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.